João Carlos Viegas Martins Bispo


AuthID: R-000-6X6

Confirmed Publications: 71



61
TITLE: Techniques for Dynamically Mapping Computations to Coprocessors
AUTHORS: João Bispo ; João M P Cardoso ;
PUBLISHED: 2011, SOURCE: 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011 in 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011
INDEXED IN: Scopus DBLP CrossRef: 1
IN MY: ORCID | DBLP
62
TITLE: On identifying and optimizing instruction sequences for dynamic compilation
AUTHORS: João Bispo ; João M P Cardoso ;
PUBLISHED: 2010, SOURCE: 2010 International Conference on Field-Programmable Technology, FPT'10 in Proceedings of the International Conference on Field-Programmable Technology, FPT 2010, 8-10 December 2010, Tsinghua University, Beijing, China
INDEXED IN: Scopus DBLP CrossRef: 7
IN MY: ORCID | DBLP
63
TITLE: On Identifying Segments of Traces for Dynamic Compilation
AUTHORS: João Bispo ; João M P Cardoso ;
PUBLISHED: 2010, SOURCE: 20th International Conference on Field Programmable Logic and Applications, FPL 2010 in International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy
INDEXED IN: Scopus DBLP CrossRef: 7
IN MY: ORCID | DBLP
64
TITLE: A model for emotional contagion based on the emotional contagion scale
AUTHORS: João Bispo ; Ana Paiva ;
PUBLISHED: 2009, SOURCE: Affective Computing and Intelligent Interaction, Third International Conference and Workshops, ACII 2009, Amsterdam, The Netherlands, September 10-12, 2009, Proceedings
INDEXED IN: Scopus DBLP CrossRef: 10
IN MY: ORCID | DBLP
65
TITLE: The role of programming models on reconfigurable computing fabrics
AUTHORS: Cardoso, JMP ; Bispo, J ; Sanches, AK;
PUBLISHED: 2009, SOURCE: Behavioral Modeling for Embedded Systems and Technologies: Applications for Design and Implementation
INDEXED IN: Scopus CrossRef
IN MY: ORCID
66
TITLE: Combining Rewriting-Logic, Architecture Generation, and Simulation to Exploit Coarse-Grained Reconfigurable Architectures
AUTHORS: Morra, C; Bispo, J ; Cardoso, JMP ; Becker, J;
PUBLISHED: 2008, SOURCE: 16th Annual IEEE Symposium on Field-Programmable Custom Computing Machines in PROCEEDINGS OF THE SIXTEENTH IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES
INDEXED IN: Scopus WOS DBLP CrossRef: 2 Handle
IN MY: ORCID | DBLP
67
TITLE: Regular expression matching in reconfigurable hardware  Full Text
AUTHORS: Ioannis Sourdis; Stamatis Vassiliadis; Joao Bispo ; Joao M P Cardoso ;
PUBLISHED: 2008, SOURCE: 5th IEEE International Conference on Field Programmable Technology in JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 51, ISSUE: 1
INDEXED IN: Scopus WOS DBLP CrossRef: 58
IN MY: ORCID | DBLP
68
TITLE: Retargeting, evaluating, and generating reconfigurable array-based architectures
AUTHORS: Morra, C; Cardoso, JMP ; Bispo, J ; Becker, J;
PUBLISHED: 2008, SOURCE: 2008 Symposium on Application Specific Processors in 2008 SYMPOSIUM ON APPLICATION SPECIFIC PROCESSORS
INDEXED IN: Scopus WOS DBLP CrossRef: 1 Handle
IN MY: ORCID | DBLP
69
TITLE: Synthesis of regular expressions for FPGAs  Full Text
AUTHORS: Joao Bispo ; Joao M P Cardoso ;
PUBLISHED: 2008, SOURCE: INTERNATIONAL JOURNAL OF ELECTRONICS, VOLUME: 95, ISSUE: 7
INDEXED IN: Scopus WOS CrossRef: 7
IN MY: ORCID
70
TITLE: Synthesis of regular expressions targeting FPGAs: Current status and open issues  Full Text
AUTHORS: Joao Bispo ; Ioannis Sourdis; Joao M P Cardoso ; Stamatis Vassiliadis;
PUBLISHED: 2007, SOURCE: 3rd International Workshop on Applied Reconfigurable Computing in RECONFIGURABLE COMPUTING: ARCHITECTURES, TOOLS AND APPLICATIONS, VOLUME: 4419
INDEXED IN: Scopus WOS DBLP CrossRef: 13
IN MY: ORCID | DBLP
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