João Manuel Paiva Cardoso


AuthID: R-000-75E

Confirmed Publications: 266



231
TITLE: Applied reconfigurable computing  Full Text
AUTHORS: Joao M P Cardoso ; George A Constantinides;
PUBLISHED: 2006, SOURCE: INTERNATIONAL JOURNAL OF ELECTRONICS, VOLUME: 93, ISSUE: 6
INDEXED IN: Scopus WOS CrossRef
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232
TITLE: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics): Preface
AUTHORS: Bertels, K; Cardoso, J ; Vassiliadis, S;
PUBLISHED: 2006, SOURCE: 2nd International Workshop on Applied Reconfigurable Computing, ARC 2006 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 3985 LNCS
INDEXED IN: Scopus
IN MY: ORCID | CIÊNCIAVITAE
233
TITLE: Mesh Mapping Exploration for Coarse-Grained Reconfigurable Array Architectures
AUTHORS: Marcos Vinícius da Silva; Ricardo S Ferreira; Alisson Garcia; João M P Cardoso ;
PUBLISHED: 2006, SOURCE: 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006 in 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006, San Luis Potosi, Mexico, September 20-22, 2006
INDEXED IN: Scopus DBLP CrossRef: 8
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234
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236
TITLE: Regular expression matching for reconfigurable packet inspection
AUTHORS: Joao Bispo ; Ioannis Sourdis; Joao M P Cardoso ; Stamatis Vassiliadis;
PUBLISHED: 2006, SOURCE: 5th IEEE International Conference on Field Programmable Technology in 2006 IEEE INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef: 73
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237
TITLE: A test infrastructure for compilers targeting FPGAs
AUTHORS: Rodrigues, RMM; Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: International Workshop on Applied Reconfigurable Computing 2005, ARC 2005 in ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005
INDEXED IN: Scopus
IN MY: ORCID | CIÊNCIAVITAE
238
TITLE: An infrastructure to functionally test designs generated by compilers targeting FPGAs PDF  Full Text
AUTHORS: Rodrigues, R; Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE 05) in DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, VOLUME: I
INDEXED IN: Scopus WOS DBLP arXiv CrossRef: 3
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239
TITLE: CHIADO - Compilation of high-level computationally intensive algorithms to dynamically reconfligurable computing systems
AUTHORS: Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Conference on VLSI Circuits and Systems II in VLSI Circuits and Systems II, Pts 1 and 2, VOLUME: 5837
INDEXED IN: Scopus WOS CrossRef: 1
IN MY: ORCID | ResearcherID | CIÊNCIAVITAE
240
TITLE: Compilation and temporal partitioning for a coarse-grain reconfigurable architecture  Full Text
AUTHORS: Cardoso, JMP ; Weinhardt, M;
PUBLISHED: 2005, SOURCE: New Algorithms, Architectures and Applications for Reconfigurable Computing
INDEXED IN: Scopus CrossRef: 2
IN MY: ORCID | ResearcherID
Page 24 of 27. Total results: 266.

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