João Paulo de Castro Canas Ferreira


AuthID: R-000-7A5

Confirmed Publications: 96



11
TITLE: Hardware architecture for integrate-and-fire signal reconstruction on FPGA
AUTHORS: Carvalho, G ; Ferreira, JC ; Tavares, VG ;
PUBLISHED: 2020, SOURCE: 35th Conference on Design of Circuits and Integrated Systems (DCIS) in 2020 XXXV CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS)
INDEXED IN: Scopus WOS DBLP CrossRef: 1
IN MY: ORCID | DBLP
12
TITLE: Improving Performance and Energy Consumption in Embedded Systems via Binary Acceleration: A Survey  Full Text
AUTHORS: Nuno Paulin ; Joao Canas Ferreira ; Joao M P Cardoso ;
PUBLISHED: 2020, SOURCE: ACM COMPUTING SURVEYS, VOLUME: 53, ISSUE: 1
INDEXED IN: Scopus WOS DBLP CrossRef: 9
IN MY: ORCID | DBLP
13
TITLE: Optimizing OpenCL Code for Performance on FPGA: k-Means Case Study With Integer Data Sets
AUTHORS: Paulino, N ; Ferreira, JC ; Cardoso, JMP ;
PUBLISHED: 2020, SOURCE: IEEE ACCESS, VOLUME: 8
INDEXED IN: Scopus WOS DBLP CrossRef: 4
IN MY: ORCID | DBLP
14
TITLE: Parallel Implementation of K-Means Algorithm on FPGA
AUTHORS: Dias, LA; Ferreira, JC ; Fernandes, MAC;
PUBLISHED: 2020, SOURCE: IEEE ACCESS, VOLUME: 8
INDEXED IN: Scopus WOS DBLP CrossRef: 15
IN MY: ORCID | DBLP
15
TITLE: A precise low power and hardware-efficient time synchronization method for wearable systems
AUTHORS: Derogarian, F; Ferreira, JC ; Tavares, VG ; Da Silva, JM ; Fernando José Velez ;
PUBLISHED: 2019, SOURCE: Wearable Technologies and Wireless Body Sensor Networks for Healthcare
INDEXED IN: Scopus CrossRef
IN MY: ORCID
16
TITLE: A reliable wearable system for BAN applications with a high number of sensors and high data rate
AUTHORS: Derogarian, F; Ferreira, JC ; Tavares, VG ; Silva, JM ; Fernando José Velez ;
PUBLISHED: 2019, SOURCE: Wearable Technologies and Wireless Body Sensor Networks for Healthcare
INDEXED IN: Scopus CrossRef
IN MY: ORCID
17
TITLE: An FPGA-Oriented Baseband Modulator Architecture for 4G/5G Communication Scenarios  Full Text
AUTHORS: Ferreira, ML; Ferreira, JC ;
PUBLISHED: 2019, SOURCE: ELECTRONICS, VOLUME: 8, ISSUE: 1
INDEXED IN: Scopus WOS CrossRef: 9
IN MY: ORCID
18
TITLE: Dynamic Partial Reconfiguration of Customized Single-Row Accelerators  Full Text
AUTHORS: Paulino, NMC ; Ferreira, JC ; Cardoso, JMP ;
PUBLISHED: 2019, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 27, ISSUE: 1
INDEXED IN: Scopus WOS DBLP CrossRef: 7
IN MY: ORCID | DBLP
19
TITLE: Parallel Implementation on FPGA of Support Vector Machines Using Stochastic Gradient Descent  Full Text
AUTHORS: Lopes, FE; Ferreira, JC ; Fernandes, MAC;
PUBLISHED: 2019, SOURCE: ELECTRONICS, VOLUME: 8, ISSUE: 6
INDEXED IN: Scopus WOS CrossRef: 23
IN MY: ORCID
20
TITLE: Preface to the Special Issue on Methods, Tools, and Architectures for Signal and Image Processing  Full Text
AUTHORS: Ferreira, JC ; Palumbo, F;
PUBLISHED: 2019, SOURCE: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 91, ISSUE: 7
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID | DBLP
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