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AuthID: R-000-85F

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TITLE: Generating Worst-Case Stimuli for Accurate Power Grid Analysis
AUTHORS: Pedro Marques Morgado; Paulo F Flores ; Jose C Monteiro ; Silveira, L. Miguel ;
PUBLISHED: 2009, SOURCE: 18th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) in INTEGRATED CIRCUIT AND SYSTEMS DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, VOLUME: 5349

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TITLE: Parameter Timing in SVM-Based Power Macro-Modeling
AUTHORS: Antonio Gusmao; Silveira, L. Miguel ; Jose Monteiro ;
PUBLISHED: 2009, SOURCE: 10th International Symposium on Quality Electronic Design in ISQED 2009: PROCEEDINGS 10TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, VOLS 1 AND 2

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TITLE: Power and Delay Comparison of Binary and Quaternary Arithmetic Circuits
AUTHORS: Cristiano Lazzari; Paulo Flores ; Jose Carlos Monteiro ;
PUBLISHED: 2009, SOURCE: 3rd International Conference on Signals, Circuits and Systems in 2009 3RD INTERNATIONAL CONFERENCE ON SIGNALS, CIRCUITS AND SYSTEMS (SCS 2009)

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TITLE: Computation of the minimal set of paths for observability-based statement coverage
AUTHORS: Costa, J; Monteiro, J ;
PUBLISHED: 2008, SOURCE: 15th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2008 in Proceedings of The 15th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2008

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TITLE: Efficient dedicated multiplication blocks for 2's complement radix-16 and radix-256 array multipliers
AUTHORS: Pieper, LZ; Da Costa, EAC; De Almeida, SJM; Bampi, S; Monteiro, JC ;
PUBLISHED: 2008, SOURCE: 2008 2nd International Conference on Signals, Circuits and Systems, SCS 2008 in 2008 2nd International Conference on Signals, Circuits and Systems, SCS 2008

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