Toggle navigation
Publications
Researchers
Institutions
0
Sign In
Federated Authentication
(Click on the image)
Local Sign In
Password Recovery
Register
Sign In
Leonel Augusto Pires Seabra Sousa
AuthID:
R-000-93B
Publications
Confirmed
To Validate
Document Source:
All
Document Type:
All Document Types
Proceedings Paper (170)
Article (94)
Book Chapter (7)
Editorial Material (3)
Correction (2)
Proceedings (2)
Article in Press (2)
Erratum (1)
Abstract (1)
Review (1)
Year Start - End:
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
-
2024
2023
2022
2021
2020
2019
2018
2017
2016
2015
2014
2013
2012
2011
2010
2009
2008
2007
2006
2005
2004
2003
2002
2001
2000
1999
1998
1997
1996
1995
1994
1993
1992
1991
1990
Order:
Year Dsc
Year Asc
Cit. WOS Dsc
IF WOS Dsc
Cit. Scopus Dsc
IF Scopus Dsc
Title Asc
Title Dsc
Results:
10
20
30
40
50
Confirmed Publications: 283
161
TITLE:
Parallel LDPC Decoding on GPUs Using a Stream-Based Computing Approach
Full Text
AUTHORS:
Gabriel Falcao
;
Shinichi Yamagiwa
;
Vitor Silva
;
Leonel Sousa
;
PUBLISHED:
2009
,
SOURCE:
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,
VOLUME:
24,
ISSUE:
5
INDEXED IN:
Scopus
WOS
IN MY:
ResearcherID
162
TITLE:
Parallel LDPC Decoding on GPUs Using a Stream-Based Computing Approach
Full Text
AUTHORS:
Gabriel Falcão Paiva Fernandes
;
Shinichi Yamagiwa
;
Vítor Manuel Mendes da Silva
;
Leonel Sousa
;
PUBLISHED:
2009
,
SOURCE:
J. Comput. Sci. Technol.,
VOLUME:
24,
ISSUE:
5
INDEXED IN:
DBLP
CrossRef
:
18
IN MY:
ORCID
|
DBLP
163
TITLE:
Parallel LDPC Decoding on the Cell/BE Processor
AUTHORS:
Gabriel Falcao
;
Leonel Sousa
;
Vitor Silva
;
Jose Marinho
;
PUBLISHED:
2009
,
SOURCE:
4th International Conference on High Performance Embedded Architectures and Compilers
in
HIGH PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS, PROCEEDINGS,
VOLUME:
5409
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
5
IN MY:
ORCID
|
ResearcherID
|
DBLP
164
TITLE:
Preface
AUTHORS:
Leonel Sousa
;
PUBLISHED:
2009
,
SOURCE:
Euro-Par 2009 - Parallel Processing Workshops, HPPC, HeteroPar, PROPER, ROIA, UNICORE, VHPC, Delft, The Netherlands, August 25-28, 2009, Revised Selected Papers,
VOLUME:
6043
INDEXED IN:
DBLP
IN MY:
DBLP
165
TITLE:
Residue-to-binary converters for the moduli set {22n+1-1,2 2n,2n-1}
AUTHORS:
Gbolagade, KA
;
Chaves, R
;
Sousa, L
;
Cotofana, SD
;
PUBLISHED:
2009
,
SOURCE:
2nd International Conference on Adaptive Science and Technology, ICAST 2009
in
ICAST 2009 - 2nd International Conference on Adaptive Science and Technology
INDEXED IN:
Scopus
CrossRef
IN MY:
ORCID
166
TITLE:
A parallel algorithm for advanced video motion estimation on multicore architectures
AUTHORS:
Svetislav Momcilovic
;
Leonel Sousa
;
PUBLISHED:
2008
,
SOURCE:
2nd International Conference on Complex, Intelligent and Software Intensive Systems
in
CISIS 2008: THE SECOND INTERNATIONAL CONFERENCE ON COMPLEX, INTELLIGENT AND SOFTWARE INTENSIVE SYSTEMS, PROCEEDINGS
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
IN MY:
ORCID
|
ResearcherID
|
DBLP
167
TITLE:
An RNS based specific processor for Computing the Minimum Sum-of-Absolute-Differences
AUTHORS:
Pedro Miguens Matutino
;
Leonel Sousa
;
PUBLISHED:
2008
,
SOURCE:
11th Euromicro Conference on Digital System Design
in
11TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - ARCHITECTURES, METHODS AND TOOLS : DSD 2008, PROCEEDINGS
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
IN MY:
ORCID
|
ResearcherID
|
DBLP
168
TITLE:
Application Specific Programmable IP Core for Motion Estimation: Technology Comparison Targeting Efficient Embedded Co-Processing Units
AUTHORS:
Nuno Sebastiao
; Tiago Diasu;
Nuno Roma
;
Paulo Flores
;
Leonel Sousa
;
PUBLISHED:
2008
,
SOURCE:
11th Euromicro Conference on Digital System Design
in
11TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - ARCHITECTURES, METHODS AND TOOLS : DSD 2008, PROCEEDINGS
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
IN MY:
ORCID
|
ResearcherID
|
DBLP
169
TITLE:
BRAM-LUT tradeoff on a polymorphic DES design
Full Text
AUTHORS:
Ricardo Chaves
; Blagomir Donchev; Georgi Kuzmanov;
Leonel Sousa
;
Stamatis Vassiliadis
;
PUBLISHED:
2008
,
SOURCE:
3rd International Conference on High Performance Embedded Architectures and Compilers
in
HIGH PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS,
VOLUME:
4917
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
IN MY:
ORCID
|
ResearcherID
|
DBLP
170
TITLE:
Cost-efficient SHA hardware accelerators
Full Text
AUTHORS:
Ricardo Chaves
; Georgi Kuzmanov;
Leonel Sousa
;
Starnatis Vassiliadis
;
PUBLISHED:
2008
,
SOURCE:
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,
VOLUME:
16,
ISSUE:
8
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
IN MY:
ORCID
|
ResearcherID
|
DBLP
Add to Marked List
Check All
Export
×
Publication Export Settings
BibTex
EndNote
APA
CSV
PDF
Export Preview
Print
×
Publication Print Settings
HTML
PDF
Print Preview
Page 17 of 29. Total results: 283.
<<
<
13
14
15
16
17
18
19
20
21
>
>>
×
Select Source
This publication has:
2 records from
ISI
2 records from
SCOPUS
2 records from
DBLP
2 records from
Unpaywall
2 records from
Openlibrary
2 records from
Handle
Please select which records must be used by Authenticus!
×
Preview Publications
© 2024 CRACS & Inesc TEC - All Rights Reserved
Privacy Policy
|
Terms of Service