Valeri Skliarov
AuthID: R-000-HBV
91
TITLE: A dynamically reconfigurable accelerator for operations over Boolean and ternary vectors
AUTHORS: Sklyarov, V; Skliarova, L; Oliveira, A; Ferrari, AB;
PUBLISHED: 2003, SOURCE: Euromicro Symposium on Digital System Design in EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS
AUTHORS: Sklyarov, V; Skliarova, L; Oliveira, A; Ferrari, AB;
PUBLISHED: 2003, SOURCE: Euromicro Symposium on Digital System Design in EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS
92
TITLE: Design tools and reusable libraries for FPGA-based digital circuits
AUTHORS: Sklyarov, V; Skliarova, I ; Almeida, P; Almeida, M;
PUBLISHED: 2003, SOURCE: Euromicro Symposium on Digital System Design in EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS
AUTHORS: Sklyarov, V; Skliarova, I ; Almeida, P; Almeida, M;
PUBLISHED: 2003, SOURCE: Euromicro Symposium on Digital System Design in EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS
93
TITLE: Modeling, synthesis and implementation of communicating hierarchical FSM
AUTHORS: Sklyarov, V;
PUBLISHED: 2003, SOURCE: 2nd International Workshop on System-on-Chip for Real-Time Applications in SYSTEM-ON-CHIP FOR REAL-TIME APPLICATIONS
AUTHORS: Sklyarov, V;
PUBLISHED: 2003, SOURCE: 2nd International Workshop on System-on-Chip for Real-Time Applications in SYSTEM-ON-CHIP FOR REAL-TIME APPLICATIONS
INDEXED IN: WOS
94
TITLE: Reconfigurable models of finite state machines and their implementation in FPGAs Full Text
AUTHORS: Sklyarov, V;
PUBLISHED: 2002, SOURCE: JOURNAL OF SYSTEMS ARCHITECTURE, VOLUME: 47, ISSUE: 14-15
AUTHORS: Sklyarov, V;
PUBLISHED: 2002, SOURCE: JOURNAL OF SYSTEMS ARCHITECTURE, VOLUME: 47, ISSUE: 14-15
95
TITLE: An evolutionary algorithm for the synthesis of RAM-Based FSMs
AUTHORS: Sklyarov, V;
PUBLISHED: 2002, SOURCE: 15th International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems (IEA/AIE 2002) in DEVELOPMENTS IN APPLIED ARTIFICAIL INTELLIGENCE, PROCEEDINGS, VOLUME: 2358
AUTHORS: Sklyarov, V;
PUBLISHED: 2002, SOURCE: 15th International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems (IEA/AIE 2002) in DEVELOPMENTS IN APPLIED ARTIFICAIL INTELLIGENCE, PROCEEDINGS, VOLUME: 2358
INDEXED IN: WOS
96
TITLE: An evolutionary algorithm for the synthesis of RAM-based FSMs
AUTHORS: Sklyarov, V;
PUBLISHED: 2002, SOURCE: 15th International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems, IEA/AIE 2002 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 2358
AUTHORS: Sklyarov, V;
PUBLISHED: 2002, SOURCE: 15th International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems, IEA/AIE 2002 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 2358
INDEXED IN: Scopus
IN MY: ORCID
97
TITLE: Dynamically reconfigurable implementation of control circuits
AUTHORS: Lau, N ; Sklyarov, V;
PUBLISHED: 2000, SOURCE: IFIP 10th International Conference on Very Large Scale Integration (VLSI 99) in VLSI: SYSTEMS ON A CHIP, VOLUME: 34
AUTHORS: Lau, N ; Sklyarov, V;
PUBLISHED: 2000, SOURCE: IFIP 10th International Conference on Very Large Scale Integration (VLSI 99) in VLSI: SYSTEMS ON A CHIP, VOLUME: 34
INDEXED IN: WOS
98
TITLE: Synthesis of control circuits with dynamically modifiable behavior on the basis of statically reconfigurable FPGAs
AUTHORS: Sklyarov, V;
PUBLISHED: 2000, SOURCE: 13th Symposium on Integrated Circuits and Systems Design in 13TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS
AUTHORS: Sklyarov, V;
PUBLISHED: 2000, SOURCE: 13th Symposium on Integrated Circuits and Systems Design in 13TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS
INDEXED IN: WOS
99
TITLE: Hierarchical finite-state machines and their use for digital control Full Text
AUTHORS: Sklyarov, V;
PUBLISHED: 1999, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 7, ISSUE: 2
AUTHORS: Sklyarov, V;
PUBLISHED: 1999, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 7, ISSUE: 2
100
TITLE: Graphical description and hardware implementation of parallel control algorithms
AUTHORS: Sklyarov, V;
PUBLISHED: 1999, SOURCE: International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA 99) in INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED PROCESSING TECHNIQUES AND APPLICATIONS, VOLS I-V, PROCEEDINGS
AUTHORS: Sklyarov, V;
PUBLISHED: 1999, SOURCE: International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA 99) in INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED PROCESSING TECHNIQUES AND APPLICATIONS, VOLS I-V, PROCEEDINGS
INDEXED IN: WOS