31
TITLE: FPGA-based time and cost effective Hamming weight comparators for binary vectors
AUTHORS: Sklyarov, V; Skliarova, I; Sudnitson, A; Kruus, M;
PUBLISHED: 2015, SOURCE: International Conference on Computer as a Tool, IEEE EUROCON 2015 in Proceedings - EUROCON 2015
INDEXED IN: Scopus CrossRef: 2
32
TITLE: On-Chip Hardware Accelerators for Data Processing and Combinatorial Search
AUTHORS: Valery Sklyarov; Iouliia Skliarova;
PUBLISHED: 2015, SOURCE: 9th International Conference of INFORMATIOM and COMMUNICATION TECHNOLOGIES (AICT) in 2015 9TH INTERNATIONAL CONFERENCE ON APPLICATION OF INFORMATION AND COMMUNICATION TECHNOLOGIES (AICT)
INDEXED IN: WOS
33
TITLE: Integration of High-Level Synthesis to the Courses on Reconfigurable Digital Systems
AUTHORS: Skliarova, I; Sklyarov, V; Sudnitson, A; Kruus, M;
PUBLISHED: 2015, SOURCE: 38th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO) in 2015 8TH INTERNATIONAL CONVENTION ON INFORMATION AND COMMUNICATION TECHNOLOGY, ELECTRONICS AND MICROELECTRONICS (MIPRO)
INDEXED IN: WOS
34
TITLE: Hardware Accelerators for Data Sort in All Programmable Systems-on-Chip  Full Text
AUTHORS: SKLYAROV, V; SKLIAROVA, I;
PUBLISHED: 2015, SOURCE: Advances in Electrical and Computer Engineering - AECE, VOLUME: 15, ISSUE: 4
INDEXED IN: CrossRef: 1
35
TITLE: FPGA-based Time and Cost Effective Hamming Weight Comparators for Binary Vectors
AUTHORS: Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson; Margus Kruus;
PUBLISHED: 2015, SOURCE: International Conference on Computer as a Tool (EUROCON), IEEE in IEEE EUROCON 2015 - INTERNATIONAL CONFERENCE ON COMPUTER AS A TOOL (EUROCON)
INDEXED IN: WOS
36
TITLE: Hamming Weight Counters and Comparators based on Embedded DSP Blocks for Implementation in FPGA
AUTHORS: Valery Sklyarov; Iouliia Skliarova;
PUBLISHED: 2014, SOURCE: ADVANCES IN ELECTRICAL AND COMPUTER ENGINEERING, VOLUME: 14, ISSUE: 2
INDEXED IN: Scopus WOS
IN MY: ORCID
37
TITLE: High-performance implementation of regular and easily scalable sorting networks on an FPGA  Full Text
AUTHORS: Valery Sklyarov; Iouliia Skliarova;
PUBLISHED: 2014, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 38, ISSUE: 5
INDEXED IN: Scopus WOS CrossRef: 20
IN MY: ORCID
38
TITLE: Teaching FPGA-based Systems
AUTHORS: Iouliia Skliarova; Valery Sklyarov; Alexander Sudnitson; Margus Kruus;
PUBLISHED: 2014, SOURCE: IEEE Global Engineering Education Conference in 2014 IEEE GLOBAL ENGINEERING EDUCATION CONFERENCE (EDUCON)
INDEXED IN: Scopus WOS CrossRef: 2
IN MY: ORCID
39
TITLE: Hardware/Software Co-design in Extensible Processing Platforms for Combinatorial Search Algorithms
AUTHORS: Iouliia Skliarova; Valery Sklyarov; Artjom Rjabov; Alexander Sundnitson;
PUBLISHED: 2014, SOURCE: 17th IEEE Mediterranean Electrotechnical Conference (MELECON) in 2014 17TH IEEE MEDITERRANEAN ELECTROTECHNICAL CONFERENCE (MELECON)
INDEXED IN: Scopus WOS CrossRef
IN MY: ORCID
40
TITLE: Application of Extensible Processing Platforms for Experiments with FPGA-based Circuits
AUTHORS: Valery Sklyarov; Iouliia Skliarova; Joao Silva; Artjom Rjabov; Alexander Sudnitson;
PUBLISHED: 2014, SOURCE: 17th IEEE Mediterranean Electrotechnical Conference (MELECON) in 2014 17TH IEEE MEDITERRANEAN ELECTROTECHNICAL CONFERENCE (MELECON)
INDEXED IN: Scopus WOS CrossRef
IN MY: ORCID
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