Manuel Gradim de Oliveira Gericota
AuthID: R-000-K1S
41
TITLE: Programmable logic devices: a test approach for the Input / Output blocks and Pad-to-Pin interconnections
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; José M Ferreira;
PUBLISHED: 2003
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; José M Ferreira;
PUBLISHED: 2003
INDEXED IN: Handle
42
TITLE: AR2T: Implementing a Truly SRAM-based FPGA On-Line Concurrent Testing
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; Ferreira, J. M. Martins;
PUBLISHED: 2002, SOURCE: 7th European Test Workshop (ETW’02)
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; Ferreira, J. M. Martins;
PUBLISHED: 2002, SOURCE: 7th European Test Workshop (ETW’02)
INDEXED IN: Handle
43
TITLE: On-line Testing of FPGA Logic Blocks Using Active Replication
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; José M Ferreira;
PUBLISHED: 2002, SOURCE: Norwegian Computer Science Conference (NIK’02)
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; José M Ferreira;
PUBLISHED: 2002, SOURCE: Norwegian Computer Science Conference (NIK’02)
INDEXED IN: Handle
44
TITLE: AR2T : implementing a truly SRAM-based FPGA on-line concurrent testing
AUTHORS: Manuel Gericota; Gustavo Alves; Miguel L M da Silva; José M Martins Ferreira;
PUBLISHED: 2002
AUTHORS: Manuel Gericota; Gustavo Alves; Miguel L M da Silva; José M Martins Ferreira;
PUBLISHED: 2002
INDEXED IN: Handle
45
TITLE: On-line testing of FPGA logic blocks using active replication
AUTHORS: Manuel Gericota; Gustavo R Alves; Miguel L Silva; José M M Ferreira;
PUBLISHED: 2002
AUTHORS: Manuel Gericota; Gustavo R Alves; Miguel L Silva; José M M Ferreira;
PUBLISHED: 2002
INDEXED IN: Handle
46
TITLE: An On-line Concurrent Test for Partial and Dynamically Reconfigurable FPGAs
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; Ferreira, J. M. Martins;
PUBLISHED: 2001, SOURCE: XVI Conference on Design of Circuits and Integrated Systems (DCIS’01)
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; Ferreira, J. M. Martins;
PUBLISHED: 2001, SOURCE: XVI Conference on Design of Circuits and Integrated Systems (DCIS’01)
INDEXED IN: Handle
47
TITLE: DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; Ferreira, J. M. Martins;
PUBLISHED: 2001, SOURCE: 6th European Test Workshop (ETW'01)
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; Ferreira, J. M. Martins;
PUBLISHED: 2001, SOURCE: 6th European Test Workshop (ETW'01)
INDEXED IN: Handle
48
TITLE: Testando ...
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; Ferreira, J. M. Martins;
PUBLISHED: 2001, SOURCE: 2a Jornadas Científicas do Instituto Superior de Engenharia do Porto, ISEP
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; Ferreira, J. M. Martins;
PUBLISHED: 2001, SOURCE: 2a Jornadas Científicas do Instituto Superior de Engenharia do Porto, ISEP
INDEXED IN: Handle
49
TITLE: DRAFT: A scanning test methodology for dynamic and partially reconfigurable FPGAs
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; José M Ferreira;
PUBLISHED: 2001
AUTHORS: Manuel G Gericota; Gustavo R Alves; Miguel L Silva; José M Ferreira;
PUBLISHED: 2001
INDEXED IN: Handle
50
TITLE: DRAFT: An On-line Concurrent Test for Partial and Dynamically Reconfigurable FPGAs
AUTHORS: Manuel Gericota; Gustavo C Alves; Miguel L Silva; José M Ferreira;
PUBLISHED: 2001
AUTHORS: Manuel Gericota; Gustavo C Alves; Miguel L Silva; José M Ferreira;
PUBLISHED: 2001
INDEXED IN: Handle