F. J. Llanes Estrada
AuthID: R-006-EJ0
11
TITLE: A low-power CMOS nine-channel 40-MHz binary detection system with self-calibrated 500-mu V offset
AUTHORS: Leme, CA; Silva, J; Rodrigo, P; da Franca, JE;
PUBLISHED: 1998, SOURCE: IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOLUME: 33, ISSUE: 4
AUTHORS: Leme, CA; Silva, J; Rodrigo, P; da Franca, JE;
PUBLISHED: 1998, SOURCE: IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOLUME: 33, ISSUE: 4
