11
TITLE: H.264/AVC framework for multi-core embedded video encoders
AUTHORS: Dias, T; Roma, N ; Sousa, L ;
PUBLISHED: 2010, SOURCE: 12th International Symposium on System-on-Chip 2010, SoC 2010 in 2010 International Symposium on System-on-Chip Proceedings, SoC 2010
INDEXED IN: Scopus CrossRef
12
TITLE: Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems
AUTHORS: Dias, T; Roma, N ; Sousa, L ;
PUBLISHED: 2010, SOURCE: 2010 Conference on Design and Architectures for Signal and Image Processing, DASIP2010 in 2010 Conference on Design and Architectures for Signal and Image Processing, DASIP2010
INDEXED IN: Scopus DBLP CrossRef
13
TITLE: H.264/AVC framework for multi-core embedded video encoders
AUTHORS: Tiago Dias; Nuno Roma; Leonel Sousa;
PUBLISHED: 2010, SOURCE: 2010 International Symposium on System on Chip, SoC 2010, Tampere, September 29-30, 2010
INDEXED IN: DBLP
14
TITLE: Reconfigurable architectures and processors for real-time video motion estimation  Full Text
AUTHORS: Tiago Dias; Nuno Roma ; Leonel Sousa ; Miguel Ribeiro;
PUBLISHED: 2007, SOURCE: JOURNAL OF REAL-TIME IMAGE PROCESSING, VOLUME: 2, ISSUE: 4
INDEXED IN: Scopus WOS DBLP CrossRef
15
TITLE: Low power distance measurement unit for real-time hardware motion estimators
AUTHORS: Tiago Dias; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2006, SOURCE: 16th International Workshop on Power and Timing Modeling, Optimization and Simulation in INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, VOLUME: 4148
INDEXED IN: Scopus WOS DBLP CrossRef
16
TITLE: Efficient VLSI architecture for real-time motion estimation in advanced video coding
AUTHORS: Dias, T; Roma, N ; Sousa, L ;
PUBLISHED: 2005, SOURCE: IEEE International SOC Conference in IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS
INDEXED IN: Scopus WOS DBLP CrossRef
17
TITLE: Efficient motion vector refinement architecture for sub-pixel motion estimation systems  Full Text
AUTHORS: Dias, T; Roma, N ; Sousa, L ;
PUBLISHED: 2005, SOURCE: IEEE Workshop on Signal Processing Systems Design and Implementations (SiPS 05) in 2005 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS - DESIGN AND IMPLEMENTATION (SIPS), VOLUME: 2005
INDEXED IN: Scopus WOS CrossRef
18
TITLE: Customisable core-based architectures for real-time motion estimation on FPGAs
AUTHORS: Roma, N ; Dias, T; Sousa, L ;
PUBLISHED: 2003, SOURCE: 13th International Conference on Field-Programmable Logic and Applications (FPL 2003) in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 2778
INDEXED IN: Scopus WOS DBLP CrossRef
Page 2 of 2. Total results: 18.