Nuno Calado Correia Lourenço
AuthID: R-001-GD2
81
TITLE: Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel
AUTHORS: Pessoa, T; Lourenco, N; Martins, R; Povoa, R; Horta, N ;
PUBLISHED: 2018, SOURCE: 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 in Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018, VOLUME: 2018-January
AUTHORS: Pessoa, T; Lourenco, N; Martins, R; Povoa, R; Horta, N ;
PUBLISHED: 2018, SOURCE: 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 in Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018, VOLUME: 2018-January
82
TITLE: On the Exploration of Promising Analog IC Designs via Artificial Neural Networks
AUTHORS: Nuno Lourenço; Joao Rosa; Ricardo Martins; Helena Aidos; António Canelas; Ricardo Povoa; Nuno Horta;
PUBLISHED: 2018, SOURCE: 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2018, Prague, Czech Republic, July 2-5, 2018
AUTHORS: Nuno Lourenço; Joao Rosa; Ricardo Martins; Helena Aidos; António Canelas; Ricardo Povoa; Nuno Horta;
PUBLISHED: 2018, SOURCE: 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2018, Prague, Czech Republic, July 2-5, 2018
INDEXED IN: DBLP
83
TITLE: Analog integrated circuit design automation: Placement, routing and parasitic extraction techniques
AUTHORS: Martins, R; Lourenço, N; Horta, N ;
PUBLISHED: 2016, SOURCE: Analog Integrated Circuit Design Automation: Placement, Routing and Parasitic Extraction Techniques
AUTHORS: Martins, R; Lourenço, N; Horta, N ;
PUBLISHED: 2016, SOURCE: Analog Integrated Circuit Design Automation: Placement, Routing and Parasitic Extraction Techniques
84
TITLE: Design Automation Tasks Scheduling for Enhanced Parallel Execution of a State-of-the-Art Layout-Aware Sizing Approach
AUTHORS: David Neves; Ricardo Martins; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2016, SOURCE: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)
AUTHORS: David Neves; Ricardo Martins; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2016, SOURCE: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)
85
TITLE: Analog Integrated Circuit Design Automation. Placement, Routing and Parasitic Extraction Techniques
AUTHORS: Ricardo Martins; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2016
AUTHORS: Ricardo Martins; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2016
INDEXED IN: Openlibrary
IN MY: ORCID
86
TITLE: AIDA-CMK: AIDA-C with MOO framework
AUTHORS: Lourenço, R; Lourenço, N; Horta, N ;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology, ISSUE: 9783319159546
AUTHORS: Lourenço, R; Lourenço, N; Horta, N ;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology, ISSUE: 9783319159546
87
TITLE: Conclusion and future work
AUTHORS: Lourenço, R; Lourenço, N; Horta, N ;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology, ISSUE: 9783319159546
AUTHORS: Lourenço, R; Lourenço, N; Horta, N ;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology, ISSUE: 9783319159546
88
TITLE: Preface
AUTHORS: Ricardo Lourenço; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology, VOLUME: 43, ISSUE: 1-4
AUTHORS: Ricardo Lourenço; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology, VOLUME: 43, ISSUE: 1-4
89
TITLE: Layout-Aware Sizing of Analog ICs using Floorplan & Routing Estimates for Parasitic Extraction
AUTHORS: Nuno Lourenço; Ricardo Martins; Nuno Horta;
PUBLISHED: 2015, SOURCE: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
AUTHORS: Nuno Lourenço; Ricardo Martins; Nuno Horta;
PUBLISHED: 2015, SOURCE: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
90
TITLE: AIDA-CMK: Multi-Algorithm Optimization Kernel Applied to Analog IC Sizing
AUTHORS: Ricardo Lourenço; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology
AUTHORS: Ricardo Lourenço; Nuno Lourenço; Nuno Horta;
PUBLISHED: 2015, SOURCE: SpringerBriefs in Applied Sciences and Technology