José Carlos Alves Pereira Monteiro
AuthID: R-000-85F
21
TITLE: Combination of radix-2<sup>m</sup> multiplier blocks and adder compressors for the design of efficient 2's complement 64-bit array multipliers
AUTHORS: Leandro Zafalon Pieper; Eduardo A C da Costa; Jose C Monteiro;
PUBLISHED: 2013, SOURCE: 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI)
AUTHORS: Leandro Zafalon Pieper; Eduardo A C da Costa; Jose C Monteiro;
PUBLISHED: 2013, SOURCE: 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI)
22
TITLE: Design and Characterization of a QLUT in a Standard CMOS Process
AUTHORS: Diogo Brito; Jorge Fernandes; Paulo Flores; Jose Monteiro;
PUBLISHED: 2012, SOURCE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
AUTHORS: Diogo Brito; Jorge Fernandes; Paulo Flores; Jose Monteiro;
PUBLISHED: 2012, SOURCE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
INDEXED IN: 
WOS
WOS23
TITLE: Efficient Area and Power Multiplication Part of FFT Based on Twiddle Factor Decomposition
AUTHORS: Sidinei Ghissoni; Eduardo Costa; Jose Monteiro; Ricardo Reis;
PUBLISHED: 2012, SOURCE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
AUTHORS: Sidinei Ghissoni; Eduardo Costa; Jose Monteiro; Ricardo Reis;
PUBLISHED: 2012, SOURCE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
INDEXED IN: WOS
WOS24
TITLE: Design of Low-Complexity Digital Finite Impulse Response Filters on FPGAs
AUTHORS: Levent Aksoy; Eduardo Costa; Paulo Flores; Jose Monteiro;
PUBLISHED: 2012, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE) in DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2012)
AUTHORS: Levent Aksoy; Eduardo Costa; Paulo Flores; Jose Monteiro;
PUBLISHED: 2012, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE) in DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2012)
INDEXED IN: WOS
WOS25
TITLE: Power macro-modeling using an iterative LS-SVM method
AUTHORS: Gusmão, A; Silveira, L. Miguel ; Monteiro, J;
PUBLISHED: 2011, SOURCE: 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009 in IFIP Advances in Information and Communication Technology, VOLUME: 360
AUTHORS: Gusmão, A; Silveira, L. Miguel ; Monteiro, J;
PUBLISHED: 2011, SOURCE: 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009 in IFIP Advances in Information and Communication Technology, VOLUME: 360
26
TITLE: Hardware Implementation of a Centroid-based Localization Algorithm for Mobile Sensor Networks
AUTHORS: Leonardo L Oliveira; Gustavo F Dessbesell; Joao B Martins; Jose Monteiro;
PUBLISHED: 2011, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
AUTHORS: Leonardo L Oliveira; Gustavo F Dessbesell; Joao B Martins; Jose Monteiro;
PUBLISHED: 2011, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXED IN: WOS
WOS27
TITLE: Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications
AUTHORS: Levent Aksoy; Eduardo Costa; Paulo Flores; Jose Monteiro;
PUBLISHED: 2010, SOURCE: 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools
AUTHORS: Levent Aksoy; Eduardo Costa; Paulo Flores; Jose Monteiro;
PUBLISHED: 2010, SOURCE: 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools
28
TITLE: CentroidM. a centroid-based localization algorithm for mobile sensor networks
AUTHORS: Leonardo Londero de Oliveira; João Baptista Martins; Gustavo Fernando Dessbesell; José Monteiro;
PUBLISHED: 2010, SOURCE: Proceedings of the 23rd symposium on Integrated circuits and system design - SBCCI '10
AUTHORS: Leonardo Londero de Oliveira; João Baptista Martins; Gustavo Fernando Dessbesell; José Monteiro;
PUBLISHED: 2010, SOURCE: Proceedings of the 23rd symposium on Integrated circuits and system design - SBCCI '10
29
TITLE: Analysis of the conditions for worst case switching activity in integrated circuits
AUTHORS: Sampaio, C; Monteiro, J; Silveira, L. Miguel ;
PUBLISHED: 2010, SOURCE: 1st IEEE Latin American Symposium on Circuits and Systems, LASCAS 2010 in Proceedings - 2010 1st IEEE Latin American Symposium on Circuits and Systems, LASCAS 2010
AUTHORS: Sampaio, C; Monteiro, J; Silveira, L. Miguel ;
PUBLISHED: 2010, SOURCE: 1st IEEE Latin American Symposium on Circuits and Systems, LASCAS 2010 in Proceedings - 2010 1st IEEE Latin American Symposium on Circuits and Systems, LASCAS 2010
30
TITLE: Analysis of Power Consumption Using a New Methodology for the Capacitance Modeling of Complex Logic Gates
AUTHORS: Sidinei Ghissoni; Joao Batista D dos Santos Martins; Ricardo Augusto D da Luz Reis; Jose Carlos Monteiro;
PUBLISHED: 2010, SOURCE: 19th International Workshop on Power and Timing Modeling, Optimization and Simulation in INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, VOLUME: 5953
AUTHORS: Sidinei Ghissoni; Joao Batista D dos Santos Martins; Ricardo Augusto D da Luz Reis; Jose Carlos Monteiro;
PUBLISHED: 2010, SOURCE: 19th International Workshop on Power and Timing Modeling, Optimization and Simulation in INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, VOLUME: 5953
INDEXED IN: WOS
WOS