Alberto José Gonçalves Carvalho Proença
AuthID: R-000-009
11
TITLE: A hardware/software partition methodology targeted to an FPGA/CPLD architecture
AUTHORS: António Esteves; Alberto J Proença;
PUBLISHED: 2005
AUTHORS: António Esteves; Alberto J Proença;
PUBLISHED: 2005
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ORCID
ORCID12
TITLE: An object-oriented model for rapid prototyping of data path/control systems - a case study
AUTHORS: Ricardo J Machado; João M Fernandes; Alberto J Proença;
PUBLISHED: 1999
AUTHORS: Ricardo J Machado; João M Fernandes; Alberto J Proença;
PUBLISHED: 1999
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Handle IN MY: ORCID
ORCID13
TITLE: EDgAR: A Platform for Hardware/Software Codesign
AUTHORS: Esteves, AJ; Fernandes, JM; Proença, AJ;
PUBLISHED: 1997, SOURCE: Embedded System Applications
AUTHORS: Esteves, AJ; Fernandes, JM; Proença, AJ;
PUBLISHED: 1997, SOURCE: Embedded System Applications
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CrossRef Handle
CrossRef Handle14
TITLE: SOFHIA: A CAD Environment to Design Digital Control Systems
AUTHORS: Ricardo J Machado; João M Fernandes; Alberto J Proença;
PUBLISHED: 1997, SOURCE: Hardware Description Languages and their Applications
AUTHORS: Ricardo J Machado; João M Fernandes; Alberto J Proença;
PUBLISHED: 1997, SOURCE: Hardware Description Languages and their Applications
15
TITLE: Redes de Petri e VHDL na prototipagem rápida de sistemas digitais
AUTHORS: Ricardo J Machado; João M Fernandes; Alberto J Proença;
PUBLISHED: 1997
AUTHORS: Ricardo J Machado; João M Fernandes; Alberto J Proença;
PUBLISHED: 1997
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Handle16
TITLE: Simulação e síntese de controladores paralelos a partir de especificações baseados em redes de Petri
AUTHORS: João M Fernandes; António M S Pina; Alberto J Proença;
PUBLISHED: 1995
AUTHORS: João M Fernandes; António M S Pina; Alberto J Proença;
PUBLISHED: 1995
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Handle