Dft and Minimum Leakage Pattern Generation for Static Power Reduction During Test and Burn-In

AuthID
 P-003-8P3
5
Author(s)
Kao, WC
·
Chuang, WS
·
Lin, HT
·
Li, JCM
·
Document Type
Article
Year published
2010
Published
in IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, ISSN: 1063-8210
Volume: 18, Issue: 3, Pages: 392-400 (9)
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Publication Identifiers
SCOPUS: 2-s2.0-77649185652
Wos: WOS:000274995400005
Source Identifiers
ISSN: 1063-8210
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