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Analog Flat-Level Circuit Synthesis With Genetic Algorithms
AuthID
P-016-XAY
3
Author(s)
Campilho-Gomes, M
·
Tavares, R
·
Goes, J
Document Type
Article
Year published
2024
Published
in
IEEE ACCESS,
ISSN: 2169-3536
Volume: 12, Pages: 115532-115545 (14)
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DOI
:
10.1109/access.2024.3446308
Wos
: WOS:001303420200001
Source Identifiers
ISSN
: 2169-3536
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