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Optimization of Multi-Stage Amplifiers in Deep-Submicron Cmos Using a Distributed/Parallel Genetic Algorithm

AuthID
P-004-4G4

Author(s)

Santos Tavares, R

Paulino, N

Higino, J

Goes, J

Oliveira, JP

Document Type

Proceedings Paper

Year published

2008

Published

in PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10 in IEEE International Symposium on Circuits and Systems, ISSN: 0271-4302

Pages: 724-727 (4)

Conference

Ieee International Symposium on Circuits and Systems, Date: MAY 18-21, 2008, Location: Seattle, WA, Sponsors: IEEE

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Publication Identifiers

DOI: 10.1109/iscas.2008.4541520

SCOPUS: 2-s2.0-51749112891

Wos: WOS:000258532100185

Source Identifiers

ISSN: 0271-4302

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Optimization of Multi-Stage Amplifiers in Deep-Submicron Cmos Using a Distributed/Parallel Genetic Algorithm

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Optimization of Multi-Stage Amplifiers in Deep-Submicron Cmos Using a Distributed/Parallel Genetic Algorithm

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