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Combination of Constant Matrix Multiplication and Gate-Level Approaches for Area and Power Efficient Hybrid Radix-2 Dit Fft Realization

AuthID
P-008-25F

Author(s)

Ghissoni, S

Costa, E

Monteiro, J

Reis, R

Document Type

Proceedings Paper

Year published

2011

Published

in 2011 18th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2011

Pages: 567-570

Conference

2011 18Th Ieee International Conference on Electronics, Circuits and Systems, Icecs 2011, Date: 11 December 2011 through 14 December 2011, Location: Beirut

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Publication Identifiers

DOI: 10.1109/icecs.2011.6122338

SCOPUS: 2-s2.0-84856432714

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Combination of Constant Matrix Multiplication and Gate-Level Approaches for Area and Power Efficient Hybrid Radix-2 Dit Fft Realization

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Combination of Constant Matrix Multiplication and Gate-Level Approaches for Area and Power Efficient Hybrid Radix-2 Dit Fft Realization

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