Gain Enhancement and Input Parasitic Capacitance Reduction of Single-Stage Otas by Using Differential Voltage Combiners

AuthID
P-008-HWC
5
Author(s)
Document Type
Proceedings Paper
Year published
2013
Published
in Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013
Pages: 247-250
Conference
20Th International Conference on Mixed Design of Integrated Circuits and Systems, Mixdes 2013, Date: 20 June 2013 through 22 June 2013, Location: Gdynia
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Scopus: 2-s2.0-84888874024
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