Publications

On the Performance of Ldpc and Turbo Decoder Architectures with Unreliable Memories

AuthID
P-00G-K28

Author(s)

Andrade, J

Vosoughi, A

Wang, GH

Karakonstantis, G

Burg, A

Falcao, G

Silva, V

Cavallaro, JR

Editor(s)

Matthews,MB

Document Type

Proceedings Paper

Year published

2014

Published

in CONFERENCE RECORD OF THE 2014 FORTY-EIGHTH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS & COMPUTERS in Conference Record of the Asilomar Conference on Signals Systems and Computers, ISSN: 1058-6393

Volume: 2015-April, Pages: 542-547 (6)

Conference

48H Asilomar Conference on Signals, Systems and Computers, Date: NOV 02-05, 2014, Location: Asilomar, CA, Sponsors: IEEE Signal Proc Soc

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Publication Identifiers

DOI: 10.1109/acssc.2014.7094504

SCOPUS: 2-s2.0-84940546172

Wos: WOS:000370964900099

Source Identifiers

ISSN: 1058-6393

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