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Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications
AuthID
P-00H-S8J
4
Author(s)
Aksoy, L
·
Costa, E
·
Flores, P
·
Monteiro, J
Document Type
Proceedings Paper
Year published
2010
Published
in
2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools
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DOI
:
10.1109/dsd.2010.32
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