Publications

Power Optimized Viterbi Decoder Implementation Through Architectural Transforms

AuthID
P-00K-FDD

Author(s)

Portela, J

Monteiro, J

Editor(s)

Ferrari,A;Carro,L;Jacobi,R

Document Type

Proceedings Paper

Year published

2001

Published

in Proceedings - 14th Symposium on Integrated Circuits and Systems Design, SBCCI 2001

Pages: 212-217

Conference

14Th Symposium on Integrated Circuits and Systems Design, Sbcci 2001, Date: 10 September 2001 through 15 September 2001, Sponsors: Brazilian Computer Society (SBC);Brazilian Microelectronics Society (SBMicro);IFIP WG10.5 - International Federation for Information Processing

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