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Area-Delay-Power-Aware Adder Placement Method for Rns Reverse Converter Design

AuthID
P-00K-QP5

Author(s)

Zarandi, AAE

Molahosseini, AS

Sousa, L

Hosseinzadeh, M

Navi, K

Editor(s)

Andreou A.G.Julian P.

Document Type

Proceedings Paper

Year published

2016

Published

in LASCAS 2016 - 7th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference

Pages: 223-226

Conference

7Th Ieee Latin American Symposium on Circuits and Systems, Lascas 2016, Date: 27 February 2016 through 1 March 2016, Sponsors: Creative Solutions;Imec;Macnica DHW;Mentor Graphics;Synopsys

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Publication Identifiers

DOI: 10.1109/lascas.2016.7451050

SCOPUS: 2-s2.0-84980432986

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Area-Delay-Power-Aware Adder Placement Method for Rns Reverse Converter Design

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