Circuit Synthesis for Guaranteed Positive Sparse Realization of Passive State-Space Models

AuthID
 P-00M-TPS
2
Author(s)
Villena, JF
·
Document Type
Article
Year published
2017
Published
in IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, ISSN: 1549-8328
Volume: 64, Issue: 6, Pages: 1576-1587 (12)
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Publication Identifiers
Scopus: 2-s2.0-84981342154
Wos: WOS:000402729200026
Source Identifiers
ISSN: 1549-8328
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