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Worst-Case Stall Analysis for Multicore Architectures with Two Memory Controllers
AuthID
P-00N-ZQX
5
Author(s)
Awan, MA
·
Souto, PF
·
Bletsas, K
·
Akesson, B
·
Tovar, E
1
Editor(s)
Altmeyer,S
Document Type
Proceedings Paper
Year published
2018
Published
in
30th Euromicro Conference on Real-Time Systems, ECRTS 2018, July 3-6, 2018, Barcelona, Spain
in
LIPIcs,
ISSN: 1868-8969
Volume: 106, Pages: 2:1-2:22
Conference
30Th Euromicro Conference on Real-Time Systems, Ecrts 2018,
Date:
3 June 2018 through 6 June 2018
Indexing
Scopus
®
Dblp
®
/en/publications/view/720637
Handle
®
Google Scholar
®
Metadata
Sources
Publication Identifiers
DOI
:
10.4230/lipics.ecrts.2018.2
DBLP
: conf/ecrts/AwanSBAT18
Handle
:
https://hdl.handle.net/10400.22/12323
SCOPUS
: 2-s2.0-85049333646
Source Identifiers
ISSN
: 1868-8969
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