A 1-Mu S Ramp Time 12-Bit Column-Parallel Flash Tdc-Interpolated Single-Slope Adc With Digital Delay-Element Calibration

AuthID
 P-00Q-0D7
3
Author(s)
Wany, M
·
Choubey, B
Document Type
Article
Year published
2019
Published
in IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, ISSN: 1549-8328
Volume: 66, Issue: 1, Pages: 54-67 (14)
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Publication Identifiers
Wos: WOS:000452625900005
Source Identifiers
ISSN: 1549-8328
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