Time-Predictable Task-To-Thread Mapping in Multi-Core Processors

AuthID
P-010-0TW
5
Author(s)
Royuela, S
·
Quinones, E
Document Type
Article
Year published
2024
Published
in JOURNAL OF SYSTEMS ARCHITECTURE, ISSN: 1383-7621
Volume: 148, Pages: 103068 (18)
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Publication Identifiers
SCOPUS: 2-s2.0-85185008119
Wos: WOS:001188910500001
Source Identifiers
ISSN: 1383-7621
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