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TITLE: Detection of IJTAG Attacks Using LDPC-based Feature Reduction and Machine Learning
AUTHORS: Xuanle L Ren; (Shawn) D S Blanton; Vitor Grade Tavares ;
PUBLISHED: 2018, SOURCE: 23rd IEEE European Test Symposium (ETS) in 2018 23RD IEEE EUROPEAN TEST SYMPOSIUM (ETS), VOLUME: 2018-May

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TITLE: High-Gain Transimpedance Amplifier for Flexible Radiation Dosimetry Using InGaZnO TFTs
AUTHORS: Pydi Ganga Bahubalindruni; Jorge Martins; Ana Santa; Vitor Tavares ; Rodrigo Martins; Elvira Fortunato; Pedro Barquinha;
PUBLISHED: 2018, SOURCE: IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, VOLUME: 6, ISSUE: 1

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TITLE: A Complementary LC-tank Based IR-UWB Pulse Generator for BPSK Modulation
AUTHORS: Iman Kianpour ; Bilal Hussain; Vitor G Tavares ;
PUBLISHED: 2017, SOURCE: 2017 IEEE East-West Design & Test Symposium (EWDTS) in 2017 IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS)

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TITLE: A Low-Power Analog Adder and Driver Using a-IGZO TFTs
AUTHORS: Bahubalindruni, PG ; Tavares, VG ; Martins, R; Fortunato, E; Barquinha, P;
PUBLISHED: 2017, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, VOLUME: 64, ISSUE: 5

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TITLE: Europe and the Future for WPT COST Action IC1301 Team Full Text
AUTHORS: Carvalho, NB ; Georgiadis, A; Costanzo, A; Stevens, N; Kracek, J; Pessoa, L ; Roselli, L; Dualibe, F; Schreurs, D; Mutlu, S; Rogier, H; Visser, H; Takacs, A; Rocca, P; Dimitriou, A; Michalski, J; Raida, Z; Tedjini, S; Joseph, W; Duroc, Y; Sahalos, JN; Bletsas, A; Samaras, T; Nikoletseas, S; Raptis, TP; Boaventura, A; Collado, A; Trevisan, R; Minnaert, B; Svanda, M; Pereira, M; Mongiardo, M; Popov, G; Pan, N; Aubert, H; Viani, F; Siachalou, S; Kant, P; Vera, GA; Polycarpou, AC; Cruz, P; Mastri, F; Mazanek, M; Santos, H; Alimenti, F; Garcia Vazquez, H; Pollin, S; Poli, L; Belo, D; Masotti, D; Machac, J; Tavares, V ; Mezzanotte, P; Ndungidi, P; Oliveri, G; Fernandes, R; Salgado, H ; Moeyaert, V; Massa, A; Goncalves, R; Pinho, P; Monti, G; Tarricone, L; Dionigi, M; Russer, P; Russer, J; ...More
PUBLISHED: 2017, SOURCE: IEEE MICROWAVE MAGAZINE, VOLUME: 18, ISSUE: 4

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TITLE: A Learning-based Approach to Secure JTAG against Unseen Scan-based Attacks
AUTHORS: Xuanle L Ren ; (Shawn) D Blanton; Vitor Grade Tavares ;
PUBLISHED: 2016, SOURCE: IEEE-Computer-Society Annual Symposium on VLSI (ISVLSI) in 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), VOLUME: 2016-September

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TITLE: A Precise and Hardware-Efficient Time Synchronization Method for Wearable Wired Networks Full Text
AUTHORS: Fardin Derogarian; Joao Canas Ferreira ; Vitor Grade G Tavares ;
PUBLISHED: 2016, SOURCE: IEEE SENSORS JOURNAL, VOLUME: 16, ISSUE: 5

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TITLE: A small fully digital open-loop clock and data recovery circuit for wired BANs. A Small Fully Digital Open-Loop CDR Circuit for Wired BANs Full Text
AUTHORS: Fardin Derogarian; Joao Canas Ferreira ; Vitor Grade Tavares ;
PUBLISHED: 2016, SOURCE: INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, VOLUME: 44, ISSUE: 3

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TITLE: Basic Analog and Digital Circuits with a-IGZO TFTs
AUTHORS: Pydi Ganga Bahubalindruni ; Vitor Tavares ; Pedro Barquinha; Rodrigo Martins; Elvira Fortunato;
PUBLISHED: 2016, SOURCE: 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) in 2016 13TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)

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