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João Paulo Marques da Silva
AuthID:
R-000-J0P
Publications
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Document Source:
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Document Type:
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Proceedings Paper (195)
Article (57)
Unpublished (9)
Book Chapter (7)
Editorial Material (2)
Proceedings (1)
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Order:
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Year Asc
Cit. WOS Dsc
IF WOS Dsc
Cit. Scopus Dsc
IF Scopus Dsc
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Results:
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Confirmed Publications: 271
241
TITLE:
On Using Satisfiability-Based Pruning Techniques in Covering Algorithms
AUTHORS:
Vasco M Manquinho
;
João P Marques Silva
;
PUBLISHED:
2000
,
SOURCE:
2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France
INDEXED IN:
Scopus
DBLP
CrossRef
:
3
IN MY:
DBLP
242
TITLE:
Search pruning conditions for Boolean Optimization
AUTHORS:
Manquinho, VM
;
Marques Silva, J
;
PUBLISHED:
2000
,
SOURCE:
14th European Conference on Artificial Intelligence
in
ECAI 2000: 14TH EUROPEAN CONFERENCE ON ARTIFICIAL INTELLIGENCE, PROCEEDINGS,
VOLUME:
54
INDEXED IN:
WOS
DBLP
IN MY:
DBLP
243
TITLE:
Using Randomization and Learning to Solve Hard Real-World Instances of Satisfiability
AUTHORS:
Luís Baptista;
João Marques Marques Silva
;
PUBLISHED:
2000
,
SOURCE:
Principles and Practice of Constraint Programming - CP 2000, 6th International Conference, Singapore, September 18-21, 2000, Proceedings,
VOLUME:
1894
INDEXED IN:
DBLP
IN MY:
DBLP
244
TITLE:
Algorithms for solving Boolean Satisfiability in combinational circuits
AUTHORS:
Silva, LGE
;
Silveira, L. Miguel
;
Marques Silva, J
;
PUBLISHED:
1999
,
SOURCE:
Design, Automation and Test in Europe Conference and Exhibition
in
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
5
IN MY:
DBLP
245
TITLE:
Assignment and reordering of incompletely specified pattern sequences targetting minimum power dissipation
AUTHORS:
Flores, P
; Costa, J;
Neto, H
;
Monteiro, J
;
Marques Silva, J
;
PUBLISHED:
1999
,
SOURCE:
12th International Conference on VLSI Design
in
TWELFTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
30
Unpaywall
IN MY:
ORCID
|
DBLP
246
TITLE:
Combinational equivalence checking using satisfiability and recursive learning
AUTHORS:
Marques Silva, J
;
Glass, T
;
PUBLISHED:
1999
,
SOURCE:
Design, Automation and Test in Europe Conference and Exhibition
in
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
13
IN MY:
DBLP
247
TITLE:
GRASP: A search algorithm for propositional satisfiability
AUTHORS:
Marques Silva, JP
; Sakallah, KA;
PUBLISHED:
1999
,
SOURCE:
IEEE TRANSACTIONS ON COMPUTERS,
VOLUME:
48,
ISSUE:
5
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
Unpaywall
IN MY:
ORCID
|
ResearcherID
|
DBLP
248
TITLE:
On applying set covering models to test set compaction
Full Text
AUTHORS:
Flores, PF
;
Neto, HC
;
Marques Silva, JP
;
PUBLISHED:
1999
,
SOURCE:
9th Great Lakes Symposium on VLSI (GLSVLSI 99)
in
NINTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
13
IN MY:
ORCID
|
DBLP
249
TITLE:
Satisfiability-Based Functional Delay Fault Testing
AUTHORS:
Joonyoung Kim;
João Marques Marques Silva
; Karem A. Sakallah;
PUBLISHED:
1999
,
SOURCE:
VLSI: Systems on a Chip, IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI '99), December 1-4, 1999, Lisbon, Portugal,
VOLUME:
162
INDEXED IN:
DBLP
IN MY:
DBLP
250
TITLE:
Test pattern generation for width compression in BIST
AUTHORS:
Flores, P
;
Neto, H
; Chakrabarty, K;
Marques Silva, J
;
PUBLISHED:
1999
,
SOURCE:
1999 IEEE International Symposium on Circuits and Systems (ISCAS 99)
in
ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI,
VOLUME:
1
INDEXED IN:
Scopus
WOS
DBLP
IN MY:
ORCID
|
DBLP
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