261
TITLE: An enhanced static-list scheduling algorithm for temporal partitioning onto RPUs
AUTHORS: Cardoso, JMP ; Neto, HC;
PUBLISHED: 2000, SOURCE: IFIP 10th International Conference on Very Large Scale Integration (VLSI 99) in VLSI: SYSTEMS ON A CHIP, VOLUME: 34
INDEXED IN: WOS DBLP CrossRef: 9
263
TITLE: Fast hardware compilation of behaviors into an FPGA-based dynamic reconfigurable computing system
AUTHORS: Joéo M P Cardoso ; Horácio C Neto;
PUBLISHED: 1999, SOURCE: Proceedings - 12th Symposium on Integrated Circuits and Systems Design, SBCCI 1999
INDEXED IN: Scopus CrossRef: 3
IN MY: ORCID
264
TITLE: Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System
AUTHORS: João M P Cardoso ; Horácio C Neto ;
PUBLISHED: 1999, SOURCE: Proceedings of the 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCMM 1999) in 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA
INDEXED IN: Scopus DBLP CrossRef: 14
265
TITLE: Towards an automatic path from JavaTM bytecodes to hardware through high-level synthesis
AUTHORS: Cardoso Joao, MP ; Neto Horacio, C;
PUBLISHED: 1998, SOURCE: Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology in Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, VOLUME: 1
INDEXED IN: Scopus
266
TITLE: Towards an automatic path from JavaTM bytecodes to hardware through high-level synthesis
AUTHORS: João M P Cardoso ; Horácio C Neto;
PUBLISHED: 1998, SOURCE: 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998
INDEXED IN: DBLP CrossRef: 6
Page 27 of 27. Total results: 266.