Leonel Augusto Pires Seabra Sousa


AuthID: R-000-93B

Confirmed Publications: 283



21
TITLE: GPU acceleration of the HEVC decoder inter prediction module
AUTHORS: Diego de d Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: IEEE Global Conference on Signal and Information Processing, GlobalSIP 2015 in 2015 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2015, Orlando, FL, USA, December 14-16, 2015
INDEXED IN: Scopus DBLP CrossRef
IN MY: ORCID | DBLP
22
TITLE: HEVC In-Loop Filters GPU Parallelization in Embedded Systems
AUTHORS: Diego F de Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: International Conference on Embedded Computer Systems Architectures Modeling and Simulation in Proceedings International Conference on Embedded Computer Systems - Architectures, Modeling and Simulation (SAMOS XV)
INDEXED IN: WOS
23
TITLE: HEVC in-loop filters GPU parallelization in embedded systems
AUTHORS: Diego de d Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: 15th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2015 in 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2015, Samos, Greece, July 19-23, 2015
INDEXED IN: Scopus DBLP CrossRef
IN MY: ORCID | DBLP
24
TITLE: High performance IP core for HEVC quantization
AUTHORS: Tiago Dias; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2015-July
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID | DBLP
25
TITLE: Novel methodology to improve Multi-moduli architectures for Binary-to-RNS conversion
AUTHORS: Hector Pettenghi; Leonel Sousa ; Jude Angelo Ambrose;
PUBLISHED: 2015, SOURCE: 2015 Conference on Design of Circuits and Integrated Systems (DCIS) in 2015 Conference on Design of Circuits and Integrated Systems (DCIS)
INDEXED IN: WOS
26
TITLE: Novel methodology to improve Multi-moduli architectures for Binary-to-RNS conversion
AUTHORS: Pettenghi, H; Sousa, L ; Ambrose, JA;
PUBLISHED: 2015, SOURCE: Conference on Design of Circuits and Integrated Systems, DCIS 2015 in 2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015
INDEXED IN: Scopus CrossRef
IN MY: ORCID
27
TITLE: Programmable RNS Lattice-Based Parallel Cryptographic Decryption  Full Text
AUTHORS: Paulo Martins; Leonel Sousa ; Julien Eynard; Jean Claude Bajard;
PUBLISHED: 2015, SOURCE: 26th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) in PROCEEDINGS OF THE ASAP2015 2015 IEEE 26TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, VOLUME: 2015-September
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID | DBLP
28
TITLE: Real-time implementation of remotely sensed hyperspectral image unmixing on GPUs  Full Text
AUTHORS: Sanchez, S; Ramalho, R; Sousa, L ; Plaza, A;
PUBLISHED: 2015, SOURCE: JOURNAL OF REAL-TIME IMAGE PROCESSING, VOLUME: 10, ISSUE: 3
INDEXED IN: Scopus WOS
29
TITLE: Real-time implementation of remotely sensed hyperspectral image unmixing on GPUs  Full Text
AUTHORS: Sergio Sánchez; Rui Ramalho; Leonel Sousa ; Antonio Plaza;
PUBLISHED: 2015, SOURCE: J. Real-Time Image Processing, VOLUME: 10, ISSUE: 3
INDEXED IN: DBLP CrossRef
IN MY: ORCID | DBLP
30
TITLE: Real-time implementation of remotely sensed hyperspectral image unmixing on GPUs
AUTHORS: Sanchez, S; Ramalho, R; Sousa, L ; Plaza, A;
PUBLISHED: 2015, SOURCE: Journal of Real-Time Image Processing, VOLUME: 10, ISSUE: 3
INDEXED IN: Scopus
IN MY: ORCID
Page 3 of 29. Total results: 283.

A place for researchers and their institutions

Useful Links

Get Help

© 2024 CRACS & Inesc TEC - All Rights Reserved Privacy Policy | Terms of Service