ProfileOfResearchers

TITLE: FPGA Implementation of IEEE 802.15.3c Receiver
AUTHORS: Véstias, M; Sarmento, H;
PUBLISHED: 2012, SOURCE: 2012 IEEE 16TH INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS (ISCE)

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TITLE: Dynamically Reconfigurable Networks-on-Chip Using Runtime Adaptive Routers
AUTHORS: Mário P Véstias; Horácio C Neto;
PUBLISHED: 2010, SOURCE: Dynamic Reconfigurable Network-on-Chip Design - Innovations for Computational Processing and Communication

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TITLE: Implementing and testing the FPGA prototype of a DCM demodulator using the Matlab/Simulink environment
AUTHORS: Hugo Santos; Mario Vestias; Helena Sarmento;
PUBLISHED: 2010, SOURCE: 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS) in 2010 FIRST IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS)

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TITLE: Area/performance improvement of NoC architectures
AUTHORS: Véstias, MP; Neto, HC;
PUBLISHED: 2006, SOURCE: RECONFIGURABLE COMPUTING: ARCHITECTURES AND APPLICATIONS, VOLUME: 3985

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TITLE: A generic network-on-chip architecture for reconfigurable systems:: Implementation and evaluation
AUTHORS: Véstias, MP; Neto, HC;
PUBLISHED: 2006, SOURCE: 2006 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS

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TITLE: Metodologia de projecto de SoC configuráveis baseados em redes intra-chip
AUTHORS: Mário Véstias;
PUBLISHED: 2005

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Page 10 of 10. Total results: 96.

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