Mário Pereira Véstias
AuthID: R-000-CZ3
91
TITLE: Non-Volane Memory Circuits for FIMS and TAS Writing Techniques on Magnetic Tunnelling Junctions
AUTHORS: Victor Silva; Mario P Vestias; Horacio C Neto; Jorge R Fernandes;
PUBLISHED: 2012, SOURCE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
AUTHORS: Victor Silva; Mario P Vestias; Horacio C Neto; Jorge R Fernandes;
PUBLISHED: 2012, SOURCE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
INDEXED IN: 
WOS
WOS IN MY: 
ORCID
ORCID92
TITLE: FPGA Implementation of IEEE 802.15.3c Receiver
AUTHORS: Véstias, M; Sarmento, H;
PUBLISHED: 2012, SOURCE: 2012 IEEE 16TH INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS (ISCE)
AUTHORS: Véstias, M; Sarmento, H;
PUBLISHED: 2012, SOURCE: 2012 IEEE 16TH INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS (ISCE)
INDEXED IN: WOS 
Handle
WOS Handle IN MY: ORCID
ORCID93
TITLE: Dynamically Reconfigurable Networks-on-Chip Using Runtime Adaptive Routers
AUTHORS: Mário P Véstias; Horácio C Neto;
PUBLISHED: 2010, SOURCE: Dynamic Reconfigurable Network-on-Chip Design - Innovations for Computational Processing and Communication
AUTHORS: Mário P Véstias; Horácio C Neto;
PUBLISHED: 2010, SOURCE: Dynamic Reconfigurable Network-on-Chip Design - Innovations for Computational Processing and Communication
INDEXED IN: 
CrossRef
CrossRef94
TITLE: Implementing and testing the FPGA prototype of a DCM demodulator using the Matlab/Simulink environment
AUTHORS: Hugo Santos; Mario Vestias; Helena Sarmento;
PUBLISHED: 2010, SOURCE: 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS) in 2010 FIRST IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS)
AUTHORS: Hugo Santos; Mario Vestias; Helena Sarmento;
PUBLISHED: 2010, SOURCE: 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS) in 2010 FIRST IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS)
INDEXED IN: WOS
WOS IN MY: ORCID
ORCID95
TITLE: Area/performance improvement of NoC architectures
AUTHORS: Véstias, MP; Neto, HC;
PUBLISHED: 2006, SOURCE: RECONFIGURABLE COMPUTING: ARCHITECTURES AND APPLICATIONS, VOLUME: 3985
AUTHORS: Véstias, MP; Neto, HC;
PUBLISHED: 2006, SOURCE: RECONFIGURABLE COMPUTING: ARCHITECTURES AND APPLICATIONS, VOLUME: 3985
96
TITLE: A generic network-on-chip architecture for reconfigurable systems:: Implementation and evaluation
AUTHORS: Véstias, MP; Neto, HC;
PUBLISHED: 2006, SOURCE: 2006 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS
AUTHORS: Véstias, MP; Neto, HC;
PUBLISHED: 2006, SOURCE: 2006 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS
INDEXED IN: WOS
WOS IN MY: ORCID
ORCID97
TITLE: Metodologia de projecto de SoC configuráveis baseados em redes intra-chip
AUTHORS: Mário Véstias;
PUBLISHED: 2005
AUTHORS: Mário Véstias;
PUBLISHED: 2005
INDEXED IN: Handle
Handle