31
TITLE: An efficient low power multiple-value look-up table targeting quaternary FPGAs
AUTHORS: Lazzari, C; Fernandes, J; Flores, P; Monteiro, J;
PUBLISHED: 2011, SOURCE: 20th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2010 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 6448 LNCS
INDEXED IN: Scopus
IN MY: ORCID
32
TITLE: Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications
AUTHORS: Levent Aksoy; Eduardo Costa; Paulo Flores; Jose Monteiro;
PUBLISHED: 2010, SOURCE: 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools
INDEXED IN: CrossRef
IN MY: ORCID
33
TITLE: A New Quaternary FPGA Based on a Voltage-mode Multi-valued Circuit
AUTHORS: Cristiano Lazzari; Paulo Flores; Jose Monteiro; Luigi Carro;
PUBLISHED: 2010, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE) in 2010 DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2010)
INDEXED IN: WOS
34
TITLE: How to prepare a power system for 15% wind energy penetration: the Portuguese case study  Full Text
AUTHORS: Ana Estanqueiro; Rui Castro ; Pedro Flores; Joao Ricardo; Medeiros Pinto; Reis Rodrigues; Pecas P Lopes ;
PUBLISHED: 2008, SOURCE: WIND ENERGY, VOLUME: 11, ISSUE: 1
INDEXED IN: Scopus WOS CrossRef: 32
Page 4 of 4. Total results: 34.