21
TITLE: Hardware security and trust: Design and deployment of integrated circuits in a threatened environment
AUTHORS: Nicolas Sklavos; Ricardo Chaves; Giorgio Di Natale; Francesco Regazzoni;
PUBLISHED: 2017, SOURCE: Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment
INDEXED IN: Scopus
IN MY: ORCID
22
TITLE: Efficient FPGA Implementation of the SHA-3 Hash Function
AUTHORS: Magnus Sundal; Ricardo Chaves;
PUBLISHED: 2017, SOURCE: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, VOLUME: 2017-July
INDEXED IN: Scopus CrossRef: 27
IN MY: ORCID
23
TITLE: Hardware Security and Trust. Design and Deployment of Integrated Circuits in a Threatened Environment
AUTHORS: Nicolas Sklavos; Ricardo Chaves; Giorgio Di Natale; Francesco Regazzoni;
PUBLISHED: 2017
INDEXED IN: CrossRef: 26 Openlibrary
IN MY: ORCID
24
TITLE: Compact and On-the-Fly Secure Dynamic Reconfiguration for Volatile FPGAs  Full Text
AUTHORS: Hirak Kashyap; Ricardo Chaves;
PUBLISHED: 2016, SOURCE: ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS, VOLUME: 9, ISSUE: 2
INDEXED IN: Scopus WOS CrossRef
IN MY: ORCID
25
TITLE: Storekeeper: A Security-Enhanced Cloud Storage Aggregation Service
AUTHORS: Pereira, S; Alves, A; Santos, N; Chaves, R;
PUBLISHED: 2016, SOURCE: 35th IEEE International Symposium on Reliable Distributed Systems, SRDS 2016 in Proceedings of the IEEE Symposium on Reliable Distributed Systems
INDEXED IN: Scopus CrossRef: 3
IN MY: ORCID
26
TITLE: Dual CLEFIA/AES cipher core on FPGA
AUTHORS: Resende, JC; Chaves, R;
PUBLISHED: 2015, SOURCE: 11th International Symposium on Applied Reconfigurable Computing, ARC 2015 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 9040
INDEXED IN: Scopus CrossRef
IN MY: ORCID
27
TITLE: Compact dual block AES core on FPGA for CCM Protocol
AUTHORS: Resende, JC; Chaves, R;
PUBLISHED: 2015, SOURCE: 25th International Conference on Field Programmable Logic and Applications, FPL 2015 in 25th International Conference on Field Programmable Logic and Applications, FPL 2015
INDEXED IN: Scopus
IN MY: ORCID
28
TITLE: Arithmetic-based binary-to-RNS converter modulo {2n±k} for -bit dynamic range
AUTHORS: Matutino, PM; Chaves, R; Sousa, L;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 3
INDEXED IN: Scopus
IN MY: ORCID
29
TITLE: Accelerating Differential Power Analysis on heterogeneous systems
AUTHORS: Amaral, J; Regazzoni, F; Tomas, P ; Chaves, R;
PUBLISHED: 2014, SOURCE: 9th Workshop on Embedded Systems Security, WESS 2014 in Proceedings of the 9th Workshop on Embedded Systems Security, WESS 2014
INDEXED IN: Scopus CrossRef
IN MY: ORCID
30
TITLE: ROM-less RNS-to-binary converter moduli {2(2n)-1, 2(2n)+1, 2(n)-3, 2(n)+3}
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa;
PUBLISHED: 2014, SOURCE: 14 International Symposium on Integrated Circuits (ISIC) in 2014 14TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC)
INDEXED IN: WOS
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