1
TITLE: A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT Delta Sigma M
AUTHORS: Blazej Nowacki; Nuno Paulino; Joao Goes;
PUBLISHED: 2016, SOURCE: 63rd IEEE International Solid-State Circuits Conference (ISSCC) in 2016 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC), VOLUME: 59
INDEXED IN: WOS
2
TITLE: A Low Power 4th order MASH Switched-Capacitor Sigma Delta Modulator Using Ultra Incomplete Settling
AUTHORS: Blazej Nowacki; Nuno Paulino; Joao Goes;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXED IN: Scopus WOS
3
TITLE: A low power 4<sup>th</sup> order MASH switched-capacitor &#x03A3;&#x0394; modulator using ultra incomplete settling
AUTHORS: Blazej Nowacki; Nuno Paulino; Joao Goes;
PUBLISHED: 2014, SOURCE: 2014 IEEE International Symposium on Circuits and Systems (ISCAS)
INDEXED IN: CrossRef
4
TITLE: A simple 1 GHz non-overlapping two-phase clock generators for SC circuits
AUTHORS: Nowacki, B; Paulino, N; Goes, J ;
PUBLISHED: 2013, SOURCE: 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013 in Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013
INDEXED IN: Scopus
5
TITLE: A Simple 1 GHz Non-Overlapping Two-Phase Clock Generators for SC Circuits
AUTHORS: Blazej Nowacki; Nuno Paulino; Joao Goes;
PUBLISHED: 2013, SOURCE: 20th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES 2013) in MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, MIXDES 2013
INDEXED IN: WOS
6
TITLE: Design Methodology for Sigma-Delta Modulators based on a Genetic Algorithm using Hybrid Cost Functions
AUTHORS: de Melo, JLA; Nowacki, B; Paulino, N ; Goes, J ;
PUBLISHED: 2012, SOURCE: IEEE International Symposium on Circuits and Systems in 2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012)
INDEXED IN: Scopus WOS CrossRef
7
TITLE: A Fully Integrated and Reconfigurable Architecture for Coherent Self-Testing of High Speed Analog-to-Digital Converters
AUTHORS: Edinei Santin; Luis B Oliveira ; Blazej Nowacki; Joao Goes ;
PUBLISHED: 2011, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, VOLUME: 58, ISSUE: 7
INDEXED IN: Scopus WOS CrossRef
8
TITLE: A Second-Order Switched-Capacitor Delta Sigma Modulator Using Very Incomplete Settling
AUTHORS: Blazej Nowacki; Nuno Paulino ; Joao Goes ;
PUBLISHED: 2011, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXED IN: Scopus WOS
9
TITLE: A polyphase comb filter using interlaying multiplexers for high-speed single-bit sigma-delta modulators
AUTHORS: Abdollahvand, S; Goes, J ; Paulino, N ; Nowacki, B; Gomes, L ;
PUBLISHED: 2011, SOURCE: 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 in Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011
INDEXED IN: Scopus
10
TITLE: Analysis and the design of a first - Order ΔΣ modulator using very incomplete settling
AUTHORS: Nowacki, B; Paulino, N ; Goes, J ;
PUBLISHED: 2011, SOURCE: 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011 in Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011
INDEXED IN: Scopus
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