David Filipe Correia Guilherme
AuthID: R-001-Q6N
1
TITLE: Automatic layout optimizations for integrated mosfet power stages
AUTHORS: David Guilherme; Jorge Guilherme; Nuno Horta ;
PUBLISHED: 2015, SOURCE: Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design
AUTHORS: David Guilherme; Jorge Guilherme; Nuno Horta ;
PUBLISHED: 2015, SOURCE: Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design
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TITLE: Thermal-aware Floorplanning and Layout Generation of MOSFET Power Stages
AUTHORS: David Guilherme; Joao Pereira; Nuno Horta ; Jorge Guilherme;
PUBLISHED: 2015, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2015-July
AUTHORS: David Guilherme; Joao Pereira; Nuno Horta ; Jorge Guilherme;
PUBLISHED: 2015, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2015-July
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TITLE: Automatic Layout Generation of Power MOSFET Transistors in Bulk CMOS
AUTHORS: Guilherme, D; Horta, N ; Guilherme, J;
PUBLISHED: 2014, SOURCE: 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) in 2014 21ST IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)
AUTHORS: Guilherme, D; Horta, N ; Guilherme, J;
PUBLISHED: 2014, SOURCE: 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) in 2014 21ST IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)
4
TITLE: Automatic topology selection and sizing of class-D loop-filters for minimizing distortion based on an evolutionary optimization kernel Full Text
AUTHORS: David Guilherme; Jorge Guilherme ; Nuno Horta ;
PUBLISHED: 2012, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 73, ISSUE: 1
AUTHORS: David Guilherme; Jorge Guilherme ; Nuno Horta ;
PUBLISHED: 2012, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 73, ISSUE: 1
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TITLE: Automatic topology selection and sizing of class-D loop-filters for minimizing distortion
AUTHORS: Guilherme, D; Guilherme, J ; Horta, N ;
PUBLISHED: 2010, SOURCE: 2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010 in 2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010
AUTHORS: Guilherme, D; Guilherme, J ; Horta, N ;
PUBLISHED: 2010, SOURCE: 2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010 in 2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010
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