111
TITLE: Combination of a geolocation database access with infrastructure sensing in TV bands
AUTHORS: Dionisio, R ; Ribeiro, J; Marques, P; Rodriguez, J ;
PUBLISHED: 2014, SOURCE: EURASIP JOURNAL ON WIRELESS COMMUNICATIONS AND NETWORKING, VOLUME: 2014, ISSUE: 1
INDEXED IN: Scopus WOS DBLP CrossRef
112
TITLE: Improving Transfer Learning Accuracy by Reusing Stacked Denoising Autoencoders  Full Text
AUTHORS: Kandaswamy, C; Silva, LM ; Alexandre, LA ; Sousa, R; Santos, JM; de Sa, JM;
PUBLISHED: 2014, SOURCE: IEEE International Conference on Systems, Man, and Cybernetics (SMC) in 2014 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS (SMC), VOLUME: 2014-January, ISSUE: January
INDEXED IN: Scopus WOS CrossRef
113
TITLE: Noise-aware simulation-based sizing and optimization of clocked comparators  Full Text
AUTHORS: Rabuske, T; Fernandes, J;
PUBLISHED: 2014, SOURCE: Analog Integrated Circuits and Signal Processing, VOLUME: 81, ISSUE: 3
INDEXED IN: Scopus CrossRef
IN MY: ORCID
114
TITLE: Automated PECVD System for Fabrication of a-Si:H Devices
AUTHORS: Fernandes, M; Vygranenko, Y; Macarico, AF; Vieira, M;
PUBLISHED: 2014, SOURCE: 2nd Conference on Electronics, Telecommunications, and Computers (CETC) in CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, VOLUME: 17
INDEXED IN: WOS CrossRef
115
TITLE: A Sub-Ranging 2-Step 7-bit Self-Calibrated Comparator-Based Binary-Search ADC
AUTHORS: Fabio Rabuske; Taimur Rabuske; Jorge Fernandes;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXED IN: WOS
116
TITLE: Comparator-based binary-search ADC architectures for UWB receivers  Full Text
AUTHORS: Taimur Rabuske; Fabio Rabuske; Jorge Fernandes; Cesar Rodrigues; Diogo Brito;
PUBLISHED: 2013, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 77, ISSUE: 3
INDEXED IN: Scopus WOS CrossRef
IN MY: ORCID
117
TITLE: A reconfigurable computing architecture using magnetic tunneling junction memories
AUTHORS: Silva, V; Fernandes, J; Vestias, M; Neto, H;
PUBLISHED: 2013, SOURCE: 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 in 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings
INDEXED IN: Scopus CrossRef
IN MY: ORCID
118
TITLE: A RECONFIGURABLE COMPUTING ARCHITECTURE USING MAGNETIC TUNNELING JUNCTION MEMORIES
AUTHORS: Victor Silva; Jorge Fernandes; Mario Vestias; Horacio Neto;
PUBLISHED: 2013, SOURCE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
INDEXED IN: WOS
119
TITLE: Smart interface switching for energy efficient vertical handovers in ns-2  Full Text
AUTHORS: Bastos, J; Albano, M ; Marques, H; Ribeiro, J; Rodriguez, J ; Verikoukis, C;
PUBLISHED: 2012, SOURCE: IET COMMUNICATIONS, VOLUME: 6, ISSUE: 14
INDEXED IN: Scopus WOS CrossRef: 6
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