Jorge Manuel dos Santos Ribeiro Fernandes
AuthID: R-000-7S7
111
TITLE: A sub-ranging 2-Step 7-bit self-calibrated comparator-based binary-search ADC
AUTHORS: Rabuske, F; Rabuske, T; Fernandes, J;
PUBLISHED: 2014, SOURCE: 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 in Proceedings - IEEE International Symposium on Circuits and Systems
AUTHORS: Rabuske, F; Rabuske, T; Fernandes, J;
PUBLISHED: 2014, SOURCE: 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 in Proceedings - IEEE International Symposium on Circuits and Systems
112
TITLE: Noise-aware simulation-based sizing and optimization of clocked comparators Full Text
AUTHORS: Taimur Rabuske; Jorge Fernandes;
PUBLISHED: 2014, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 81, ISSUE: 3
AUTHORS: Taimur Rabuske; Jorge Fernandes;
PUBLISHED: 2014, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 81, ISSUE: 3
INDEXED IN: 
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ORCID
ORCID113
TITLE: Combination of a geolocation database access with infrastructure sensing in TV bands
AUTHORS: Dionisio, R ; Ribeiro, J; Marques, P; Rodriguez, J ;
PUBLISHED: 2014, SOURCE: EURASIP JOURNAL ON WIRELESS COMMUNICATIONS AND NETWORKING, VOLUME: 2014, ISSUE: 1
AUTHORS: Dionisio, R ; Ribeiro, J; Marques, P; Rodriguez, J ;
PUBLISHED: 2014, SOURCE: EURASIP JOURNAL ON WIRELESS COMMUNICATIONS AND NETWORKING, VOLUME: 2014, ISSUE: 1
114
TITLE: Improving Transfer Learning Accuracy by Reusing Stacked Denoising Autoencoders Full Text
AUTHORS: Kandaswamy, C; Silva, LM ; Alexandre, LA ; Sousa, R; Santos, JM; de Sa, JM;
PUBLISHED: 2014, SOURCE: IEEE International Conference on Systems, Man, and Cybernetics (SMC) in 2014 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS (SMC), VOLUME: 2014-January, ISSUE: January
AUTHORS: Kandaswamy, C; Silva, LM ; Alexandre, LA ; Sousa, R; Santos, JM; de Sa, JM;
PUBLISHED: 2014, SOURCE: IEEE International Conference on Systems, Man, and Cybernetics (SMC) in 2014 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS (SMC), VOLUME: 2014-January, ISSUE: January
115
TITLE: Noise-aware simulation-based sizing and optimization of clocked comparators Full Text
AUTHORS: Rabuske, T; Fernandes, J;
PUBLISHED: 2014, SOURCE: Analog Integrated Circuits and Signal Processing, VOLUME: 81, ISSUE: 3
AUTHORS: Rabuske, T; Fernandes, J;
PUBLISHED: 2014, SOURCE: Analog Integrated Circuits and Signal Processing, VOLUME: 81, ISSUE: 3
116
TITLE: Automated PECVD System for Fabrication of a-Si:H Devices
AUTHORS: Fernandes, M; Vygranenko, Y; Macarico, AF; Vieira, M;
PUBLISHED: 2014, SOURCE: 2nd Conference on Electronics, Telecommunications, and Computers (CETC) in CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, VOLUME: 17
AUTHORS: Fernandes, M; Vygranenko, Y; Macarico, AF; Vieira, M;
PUBLISHED: 2014, SOURCE: 2nd Conference on Electronics, Telecommunications, and Computers (CETC) in CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, VOLUME: 17
INDEXED IN: WOS 
CrossRef
WOS CrossRef117
TITLE: A Sub-Ranging 2-Step 7-bit Self-Calibrated Comparator-Based Binary-Search ADC
AUTHORS: Fabio Rabuske; Taimur Rabuske; Jorge Fernandes;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
AUTHORS: Fabio Rabuske; Taimur Rabuske; Jorge Fernandes;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXED IN: WOS
WOS118
TITLE: Comparator-based binary-search ADC architectures for UWB receivers Full Text
AUTHORS: Taimur Rabuske; Fabio Rabuske; Jorge Fernandes; Cesar Rodrigues; Diogo Brito;
PUBLISHED: 2013, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 77, ISSUE: 3
AUTHORS: Taimur Rabuske; Fabio Rabuske; Jorge Fernandes; Cesar Rodrigues; Diogo Brito;
PUBLISHED: 2013, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 77, ISSUE: 3
119
TITLE: A reconfigurable computing architecture using magnetic tunneling junction memories
AUTHORS: Silva, V; Fernandes, J; Vestias, M; Neto, H;
PUBLISHED: 2013, SOURCE: 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 in 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings
AUTHORS: Silva, V; Fernandes, J; Vestias, M; Neto, H;
PUBLISHED: 2013, SOURCE: 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 in 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings
120
TITLE: A RECONFIGURABLE COMPUTING ARCHITECTURE USING MAGNETIC TUNNELING JUNCTION MEMORIES
AUTHORS: Victor Silva; Jorge Fernandes; Mario Vestias; Horacio Neto;
PUBLISHED: 2013, SOURCE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
AUTHORS: Victor Silva; Jorge Fernandes; Mario Vestias; Horacio Neto;
PUBLISHED: 2013, SOURCE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
INDEXED IN: WOS
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