Circuit Partitioning Techniques for Power Estimation Using the Full Set of Input Correlations

AuthID
 P-00T-D3W
2
Author(s)
Document Type
Proceedings Paper
Year published
2001
Published
in Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001 in ICECS
Pages: 903-907
Indexing
Dblp®/en/publications/view/865404
Publication Identifiers
DBLP: conf/icecsys/FreitasO01
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