Stretching the Capacity of Hardware Transactional Memory in Ibm Power Architectures

AuthID
 P-00W-QDP
4
Author(s)
Filipe, R
·
Issa, S
·
Romano, P
·
2
Editor(s)
Hollingsworth,JK;Keidar,I
Document Type
Proceedings Paper
Year published
2019
Published
in Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2019, Washington, DC, USA, February 16-20, 2019 in PPoPP
Pages: 107-119
Indexing
Dblp®/en/publications/view/941494
Publication Identifiers
DBLP: conf/ppopp/FilipeI0019
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