Nuno Calado Correia Lourenço


AuthID: R-001-GD2

Publicações Confirmadas: 79



1
TÍTULO: Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement
AUTORES: Ricardo Povoa; Nuno Lourenco ; Ricardo Martins ; Antonio Canelas; Nuno Cavaco G Gomes Horta ; Joao Goes;
PUBLICAÇÃO: 2018, FONTE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, VOLUME: 65, NÚMERO: 3
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
2
TÍTULO: Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving
AUTORES: Povoa, R; Lourenco, N ; Martins, R ; Canelas, A; Horta, N ; Goes, J;
PUBLICAÇÃO: 2018, FONTE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, VOLUME: 65, NÚMERO: 11
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
3
TÍTULO: A dynamic voltage-combiners biased OTA for low-power and high-speed SC circuits
AUTORES: Póvoa, R; Canelas, A; Martins, R; Lourenço, N ; Horta, N ; Goes, J;
PUBLICAÇÃO: 2017, FONTE: 13th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2017 in PRIME 2017 - 13th Conference on PhD Research in Microelectronics and Electronics, Proceedings
INDEXADO EM: Scopus CrossRef
NO MEU: ORCID
4
TÍTULO: Automatic technology migration of analog IC designs using generic cell libraries
AUTORES: Jose Cachaco; Nuno Machado; Nuno Lourenço ; Jorge Guilherme; Nuno Horta ;
PUBLICAÇÃO: 2017, FONTE: 20th Design, Automation and Test in Europe, DATE 2017 in Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017
INDEXADO EM: Scopus DBLP CrossRef
NO MEU: ORCID
5
TÍTULO: Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing
AUTORES: Canelas, A; Martins, R; Povoa, R; Lourenco, N ; Horta, N ;
PUBLICAÇÃO: 2017, FONTE: 20th Design, Automation and Test in Europe, DATE 2017 in Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017
INDEXADO EM: Scopus CrossRef: 2
NO MEU: ORCID
6
TÍTULO: Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks
AUTORES: Martins, R; Lourenco, N ; Povoa, R; Canelas, A; Horta, N ; Passos, F; Castro Lopez, R; Roca, E; Fernandez, F;
PUBLICAÇÃO: 2017, FONTE: 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017 in SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
INDEXADO EM: Scopus CrossRef
NO MEU: ORCID
7
TÍTULO: New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization
AUTORES: Lourenco, N ; Martins, R; Povoa, R; Canelas, A; Horta, N ; Passos, F; Castro Lopez, R; Roca, E; Fernandez, FV;
PUBLICAÇÃO: 2017, FONTE: 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017 in SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
INDEXADO EM: Scopus CrossRef
NO MEU: ORCID
8
TÍTULO: Stochastic-based placement template generator for analog IC layout-aware synthesis
AUTORES: Martins, R; Lourenço, N ; Canelas, A; Horta, N ;
PUBLICAÇÃO: 2017, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 58
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
9
TÍTULO: Systematic design of a voltage controlled oscillator using a layout-aware approach
AUTORES: Passos, F; Roca, E; Castro Lopez, R; Fernandez, FV; Martins, R; Lourenco, N ; Povoa, R; Canelas, A; Horta, N ;
PUBLICAÇÃO: 2017, FONTE: 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017 in SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
INDEXADO EM: Scopus CrossRef
NO MEU: ORCID
10
TÍTULO: AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation  Full Text
AUTORES: Nuno Lourenco ; Ricardo Martins ; Antonio Canelas; Ricardo Povoa; Nuno Horta ;
PUBLICAÇÃO: 2016, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 55
INDEXADO EM: Scopus WOS CrossRef: 16
NO MEU: ORCID
Página 1 de 8. Total de resultados: 79.

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