João Carlos da Palma Goes


AuthID: R-000-6V0

Publicações Confirmadas: 82



61
TÍTULO: On-chip built-in Self-test of video-rate ADCs using Gaussian noise
AUTORES: Evans, G ; Goes, J ; Paulino, N ;
PUBLICAÇÃO: 2005, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
62
TÍTULO: Switched-capacitor circuits using a single-phase scheme
AUTORES: Goes, J ; Vaz, B; Paulino, N ; Pinto, H; Monteiro, R; Garcao, AS ;
PUBLICAÇÃO: 2005, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
63
TÍTULO: A 1.5-V 10-b 50 MS/s time-interleaved switched-opamp pipeline CMOS ADC with high energy efficiency
AUTORES: Vaz, B; Goes, J ; Paulino, N ;
PUBLICAÇÃO: 2004, FONTE: Symposium on VLSI Circuits in 2004 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, NÚMERO: CIRCUITS SYMP.
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
64
TÍTULO: Low power low-voltage CMOS A/D switched-opamp ∼A modulator for bio-potential signals using a single-phase scheme
AUTORES: Goes, J ; Pinto, H; Monteiro, R; Paulino, N ; Vaz, B; AS Garcao, ;
PUBLICAÇÃO: 2004, FONTE: 2004 IEEE International Workshop on Biomedical Circuits and Systems in 2004 IEEE International Workshop on Biomedical Circuits and Systems
INDEXADO EM: Scopus
NO MEU: ORCID
65
TÍTULO: Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance
AUTORES: Tavares, R; Vaz, B; Goes, J ; Paulino, N; Steiger Garcao, A ;
PUBLICAÇÃO: 2003, FONTE: IEEE International Symposium on Circuits and Systems in PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING, VOLUME: 1
INDEXADO EM: Scopus WOS
NO MEU: ORCID
66
TÍTULO: Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver
AUTORES: Paulino, N; Serrazina, M; Goes, J ; Steiger Garcao, A ;
PUBLICAÇÃO: 2003, FONTE: IEEE International Symposium on Circuits and Systems in PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING
INDEXADO EM: WOS
67
TÍTULO: Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver
AUTORES: Paulina, N; Serrazina, M; Goes, J ; Steiger Garcao, A ;
PUBLICAÇÃO: 2003, FONTE: Proceedings of the 2003 IEEE International Symposium on Circuits and Systems in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 1
INDEXADO EM: Scopus
NO MEU: ORCID
68
TÍTULO: Efficient digital self-calibration of video-rate pipeline ADCs using white Gaussian noise
AUTORES: Unterweissacher, M; Goes, J ; Paulino, N ; Evans, G ; Ortigueira, MD ;
PUBLICAÇÃO: 2003, FONTE: IEEE International Symposium on Circuits and Systems in PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING, VOLUME: 1
INDEXADO EM: Scopus WOS
NO MEU: ORCID
69
TÍTULO: Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation
AUTORES: Evans, G ; Goes, J ; Steiger Garcao, A ; Ortigueira, MD ; Paulino, N ; Lopes, JS;
PUBLICAÇÃO: 2003, FONTE: IEEE International Symposium on Circuits and Systems in PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING, VOLUME: 1
INDEXADO EM: Scopus WOS
NO MEU: ORCID
70
TÍTULO: An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs
AUTORES: Amaral, P; Goes, J ; Paulino, N ; Steiger Garcao, A ;
PUBLICAÇÃO: 2002, FONTE: IEEE International Symposium on Circuits and Systems in 2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V, PROCEEDINGS, VOLUME: 5
INDEXADO EM: Scopus WOS
NO MEU: ORCID
Página 7 de 9. Total de resultados: 82.

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