João Carlos Viegas Martins Bispo


AuthID: R-000-6X6

Publicações Confirmadas: 71



61
TÍTULO: Techniques for Dynamically Mapping Computations to Coprocessors
AUTORES: João Bispo ; João M P Cardoso ;
PUBLICAÇÃO: 2011, FONTE: 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011 in 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011
INDEXADO EM: Scopus DBLP CrossRef: 1
NO MEU: ORCID | DBLP
62
TÍTULO: On identifying and optimizing instruction sequences for dynamic compilation
AUTORES: João Bispo ; João M P Cardoso ;
PUBLICAÇÃO: 2010, FONTE: 2010 International Conference on Field-Programmable Technology, FPT'10 in Proceedings of the International Conference on Field-Programmable Technology, FPT 2010, 8-10 December 2010, Tsinghua University, Beijing, China
INDEXADO EM: Scopus DBLP CrossRef: 7
NO MEU: ORCID | DBLP
63
TÍTULO: On Identifying Segments of Traces for Dynamic Compilation
AUTORES: João Bispo ; João M P Cardoso ;
PUBLICAÇÃO: 2010, FONTE: 20th International Conference on Field Programmable Logic and Applications, FPL 2010 in International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy
INDEXADO EM: Scopus DBLP CrossRef: 7
NO MEU: ORCID | DBLP
64
TÍTULO: A model for emotional contagion based on the emotional contagion scale
AUTORES: João Bispo ; Ana Paiva ;
PUBLICAÇÃO: 2009, FONTE: Affective Computing and Intelligent Interaction, Third International Conference and Workshops, ACII 2009, Amsterdam, The Netherlands, September 10-12, 2009, Proceedings
INDEXADO EM: Scopus DBLP CrossRef: 10
NO MEU: ORCID | DBLP
65
TÍTULO: The role of programming models on reconfigurable computing fabrics
AUTORES: Cardoso, JMP ; Bispo, J ; Sanches, AK;
PUBLICAÇÃO: 2009, FONTE: Behavioral Modeling for Embedded Systems and Technologies: Applications for Design and Implementation
INDEXADO EM: Scopus CrossRef
NO MEU: ORCID
66
TÍTULO: Combining Rewriting-Logic, Architecture Generation, and Simulation to Exploit Coarse-Grained Reconfigurable Architectures
AUTORES: Morra, C; Bispo, J ; Cardoso, JMP ; Becker, J;
PUBLICAÇÃO: 2008, FONTE: 16th Annual IEEE Symposium on Field-Programmable Custom Computing Machines in PROCEEDINGS OF THE SIXTEENTH IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES
INDEXADO EM: Scopus WOS DBLP CrossRef: 2 Handle
NO MEU: ORCID | DBLP
67
TÍTULO: Regular expression matching in reconfigurable hardware  Full Text
AUTORES: Ioannis Sourdis; Stamatis Vassiliadis; Joao Bispo ; Joao M P Cardoso ;
PUBLICAÇÃO: 2008, FONTE: 5th IEEE International Conference on Field Programmable Technology in JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 51, NÚMERO: 1
INDEXADO EM: Scopus WOS DBLP CrossRef: 58
NO MEU: ORCID | DBLP
68
TÍTULO: Retargeting, evaluating, and generating reconfigurable array-based architectures
AUTORES: Morra, C; Cardoso, JMP ; Bispo, J ; Becker, J;
PUBLICAÇÃO: 2008, FONTE: 2008 Symposium on Application Specific Processors in 2008 SYMPOSIUM ON APPLICATION SPECIFIC PROCESSORS
INDEXADO EM: Scopus WOS DBLP CrossRef: 1 Handle
NO MEU: ORCID | DBLP
69
TÍTULO: Synthesis of regular expressions for FPGAs  Full Text
AUTORES: Joao Bispo ; Joao M P Cardoso ;
PUBLICAÇÃO: 2008, FONTE: INTERNATIONAL JOURNAL OF ELECTRONICS, VOLUME: 95, NÚMERO: 7
INDEXADO EM: Scopus WOS CrossRef: 7
NO MEU: ORCID
70
TÍTULO: Synthesis of regular expressions targeting FPGAs: Current status and open issues  Full Text
AUTORES: Joao Bispo ; Ioannis Sourdis; Joao M P Cardoso ; Stamatis Vassiliadis;
PUBLICAÇÃO: 2007, FONTE: 3rd International Workshop on Applied Reconfigurable Computing in RECONFIGURABLE COMPUTING: ARCHITECTURES, TOOLS AND APPLICATIONS, VOLUME: 4419
INDEXADO EM: Scopus WOS DBLP CrossRef: 13
NO MEU: ORCID | DBLP
Página 7 de 8. Total de resultados: 71.

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