Valeri Skliarov
AuthID: R-000-HBV
91
TÃTULO: A dynamically reconfigurable accelerator for operations over Boolean and ternary vectors
AUTORES: Sklyarov, V; Skliarova, L; Oliveira, A; Ferrari, AB;
PUBLICAÇÃO: 2003, FONTE: Euromicro Symposium on Digital System Design in EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS
AUTORES: Sklyarov, V; Skliarova, L; Oliveira, A; Ferrari, AB;
PUBLICAÇÃO: 2003, FONTE: Euromicro Symposium on Digital System Design in EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS
92
TÃTULO: Design tools and reusable libraries for FPGA-based digital circuits
AUTORES: Sklyarov, V; Skliarova, I ; Almeida, P; Almeida, M;
PUBLICAÇÃO: 2003, FONTE: Euromicro Symposium on Digital System Design in EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS
AUTORES: Sklyarov, V; Skliarova, I ; Almeida, P; Almeida, M;
PUBLICAÇÃO: 2003, FONTE: Euromicro Symposium on Digital System Design in EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS
93
TÃTULO: Modeling, synthesis and implementation of communicating hierarchical FSM
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 2003, FONTE: 2nd International Workshop on System-on-Chip for Real-Time Applications in SYSTEM-ON-CHIP FOR REAL-TIME APPLICATIONS
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 2003, FONTE: 2nd International Workshop on System-on-Chip for Real-Time Applications in SYSTEM-ON-CHIP FOR REAL-TIME APPLICATIONS
INDEXADO EM: 
WOS
WOS94
TÃTULO: Reconfigurable models of finite state machines and their implementation in FPGAs Full Text
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 2002, FONTE: JOURNAL OF SYSTEMS ARCHITECTURE, VOLUME: 47, NÚMERO: 14-15
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 2002, FONTE: JOURNAL OF SYSTEMS ARCHITECTURE, VOLUME: 47, NÚMERO: 14-15
95
TÃTULO: An evolutionary algorithm for the synthesis of RAM-Based FSMs
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 2002, FONTE: 15th International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems (IEA/AIE 2002) in DEVELOPMENTS IN APPLIED ARTIFICAIL INTELLIGENCE, PROCEEDINGS, VOLUME: 2358
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 2002, FONTE: 15th International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems (IEA/AIE 2002) in DEVELOPMENTS IN APPLIED ARTIFICAIL INTELLIGENCE, PROCEEDINGS, VOLUME: 2358
INDEXADO EM: WOS
WOS96
TÃTULO: An evolutionary algorithm for the synthesis of RAM-based FSMs
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 2002, FONTE: 15th International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems, IEA/AIE 2002 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 2358
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 2002, FONTE: 15th International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems, IEA/AIE 2002 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 2358
INDEXADO EM: 
Scopus
Scopus NO MEU: 
ORCID
ORCID97
TÃTULO: Dynamically reconfigurable implementation of control circuits
AUTORES: Lau, N ; Sklyarov, V;
PUBLICAÇÃO: 2000, FONTE: IFIP 10th International Conference on Very Large Scale Integration (VLSI 99) in VLSI: SYSTEMS ON A CHIP, VOLUME: 34
AUTORES: Lau, N ; Sklyarov, V;
PUBLICAÇÃO: 2000, FONTE: IFIP 10th International Conference on Very Large Scale Integration (VLSI 99) in VLSI: SYSTEMS ON A CHIP, VOLUME: 34
INDEXADO EM: WOS
WOS98
TÃTULO: Synthesis of control circuits with dynamically modifiable behavior on the basis of statically reconfigurable FPGAs
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 2000, FONTE: 13th Symposium on Integrated Circuits and Systems Design in 13TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 2000, FONTE: 13th Symposium on Integrated Circuits and Systems Design in 13TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS
INDEXADO EM: WOS
WOS99
TÃTULO: Hierarchical finite-state machines and their use for digital control Full Text
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 1999, FONTE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 7, NÚMERO: 2
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 1999, FONTE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 7, NÚMERO: 2
100
TÃTULO: Graphical description and hardware implementation of parallel control algorithms
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 1999, FONTE: International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA 99) in INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED PROCESSING TECHNIQUES AND APPLICATIONS, VOLS I-V, PROCEEDINGS
AUTORES: Sklyarov, V;
PUBLICAÇÃO: 1999, FONTE: International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA 99) in INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED PROCESSING TECHNIQUES AND APPLICATIONS, VOLS I-V, PROCEEDINGS
INDEXADO EM: WOS
WOS