31
TÍTULO: FPGA-based time and cost effective Hamming weight comparators for binary vectors
AUTORES: Sklyarov, V; Skliarova, I; Sudnitson, A; Kruus, M;
PUBLICAÇÃO: 2015, FONTE: International Conference on Computer as a Tool, IEEE EUROCON 2015 in Proceedings - EUROCON 2015
INDEXADO EM: Scopus CrossRef: 2
32
TÍTULO: On-Chip Hardware Accelerators for Data Processing and Combinatorial Search
AUTORES: Valery Sklyarov; Iouliia Skliarova;
PUBLICAÇÃO: 2015, FONTE: 9th International Conference of INFORMATIOM and COMMUNICATION TECHNOLOGIES (AICT) in 2015 9TH INTERNATIONAL CONFERENCE ON APPLICATION OF INFORMATION AND COMMUNICATION TECHNOLOGIES (AICT)
INDEXADO EM: WOS
33
TÍTULO: Integration of High-Level Synthesis to the Courses on Reconfigurable Digital Systems
AUTORES: Skliarova, I; Sklyarov, V; Sudnitson, A; Kruus, M;
PUBLICAÇÃO: 2015, FONTE: 38th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO) in 2015 8TH INTERNATIONAL CONVENTION ON INFORMATION AND COMMUNICATION TECHNOLOGY, ELECTRONICS AND MICROELECTRONICS (MIPRO)
INDEXADO EM: WOS
34
TÍTULO: Hardware Accelerators for Data Sort in All Programmable Systems-on-Chip  Full Text
AUTORES: SKLYAROV, V; SKLIAROVA, I;
PUBLICAÇÃO: 2015, FONTE: Advances in Electrical and Computer Engineering - AECE, VOLUME: 15, NÚMERO: 4
INDEXADO EM: CrossRef: 1
35
TÍTULO: FPGA-based Time and Cost Effective Hamming Weight Comparators for Binary Vectors
AUTORES: Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson; Margus Kruus;
PUBLICAÇÃO: 2015, FONTE: International Conference on Computer as a Tool (EUROCON), IEEE in IEEE EUROCON 2015 - INTERNATIONAL CONFERENCE ON COMPUTER AS A TOOL (EUROCON)
INDEXADO EM: WOS
36
TÍTULO: Hamming Weight Counters and Comparators based on Embedded DSP Blocks for Implementation in FPGA
AUTORES: Valery Sklyarov; Iouliia Skliarova;
PUBLICAÇÃO: 2014, FONTE: ADVANCES IN ELECTRICAL AND COMPUTER ENGINEERING, VOLUME: 14, NÚMERO: 2
INDEXADO EM: Scopus WOS
NO MEU: ORCID
37
TÍTULO: High-performance implementation of regular and easily scalable sorting networks on an FPGA  Full Text
AUTORES: Valery Sklyarov; Iouliia Skliarova;
PUBLICAÇÃO: 2014, FONTE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 38, NÚMERO: 5
INDEXADO EM: Scopus WOS CrossRef: 20
NO MEU: ORCID
38
TÍTULO: Teaching FPGA-based Systems
AUTORES: Iouliia Skliarova; Valery Sklyarov; Alexander Sudnitson; Margus Kruus;
PUBLICAÇÃO: 2014, FONTE: IEEE Global Engineering Education Conference in 2014 IEEE GLOBAL ENGINEERING EDUCATION CONFERENCE (EDUCON)
INDEXADO EM: Scopus WOS CrossRef: 2
NO MEU: ORCID
39
TÍTULO: Hardware/Software Co-design in Extensible Processing Platforms for Combinatorial Search Algorithms
AUTORES: Iouliia Skliarova; Valery Sklyarov; Artjom Rjabov; Alexander Sundnitson;
PUBLICAÇÃO: 2014, FONTE: 17th IEEE Mediterranean Electrotechnical Conference (MELECON) in 2014 17TH IEEE MEDITERRANEAN ELECTROTECHNICAL CONFERENCE (MELECON)
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
40
TÍTULO: Application of Extensible Processing Platforms for Experiments with FPGA-based Circuits
AUTORES: Valery Sklyarov; Iouliia Skliarova; Joao Silva; Artjom Rjabov; Alexander Sudnitson;
PUBLICAÇÃO: 2014, FONTE: 17th IEEE Mediterranean Electrotechnical Conference (MELECON) in 2014 17TH IEEE MEDITERRANEAN ELECTROTECHNICAL CONFERENCE (MELECON)
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
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