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TÃTULO: A 10.8-to-37.4Gb/s Single-Loop Quarter-Rate BBCDR Without External Reference and Separate FD Featuring a Wide-Frequency-Acquisition Scheme
AUTORES: Wang, L; Chen, Y; Yang, C; Zhao, X; Mak, PI; Maloberti, F; Martins, RP;
PUBLICAÇÃO: 2022, FONTE: 29th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2022 in ICECS 2022 - 29th IEEE International Conference on Electronics, Circuits and Systems, Proceedings

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TÃTULO: A 10-MHz Bandwidth Two-Path Third-Order Sigma Delta Modulator With Cross-Coupling Branches
AUTORES: Da Feng; Edoardo Bonizzoni; Franco Maloberti; Sai Weng Sin; Rui Paulo Martins;
PUBLICAÇÃO: 2018, FONTE: 1st International Symposium on Integrated Circuits and Systems (ISICAS) in IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, VOLUME: 65, NÚMERO: 10

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TÃTULO: An Integrated DC-DC Converter with Segmented Frequency Modulation and Multiphase Co-Work Control for Fast Transient Recovery
AUTORES: Chio, UF; Wen, KC; Sin, SW; Lam, CS; Lu, Y; Maloberti, F; Martins, RP;
PUBLICAÇÃO: 2018, FONTE: 2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 in 2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings

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TÃTULO: Reconfigurable mismatch-free time-interleaved bandpass sigma-delta modulator for wireless communications Full Text
AUTORES: Dongyang Jiang; Sai Weng Sin; Seng Pan U; Rui Paulo Martins; Franco Maloberti;
PUBLICAÇÃO: 2017, FONTE: ELECTRONICS LETTERS, VOLUME: 53, NÚMERO: 7

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WOS

TÃTULO: Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier with Enhancements of DC Gain, GBW and Slew Rate
AUTORES: Yan, Z; Mak, PI; Law, MK; Martins, RP; Maloberti, F;
PUBLICAÇÃO: 2015, FONTE: IEEE Journal of Solid-State Circuits, VOLUME: 50, NÚMERO: 10

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TÃTULO: Erratum: "A 0.02 mm2 59.2 dB SFDR 4th-Order SC LPF With 0.5-to-10 MHz Bandwidth Scalability Exploiting a Recycling SC-Buffer Biquad" (IEEE Journal of Solid-State Circuits (2015) 50:10)
AUTORES: Mohan, PVA; Zhao, Y; Mak, PI; Martins, RP; Maloberti, F;
PUBLICAÇÃO: 2015, FONTE: IEEE Journal of Solid-State Circuits, VOLUME: 50, NÚMERO: 10

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TÃTULO: A 0.02 mm(2) 59.2 dB SFDR 4th-Order SC LPF With 0.5-to-10 MHz Bandwidth Scalability Exploiting a Recycling SC-Buffer Biquad (vol 50, pg 1988, 2015)
AUTORES: Ananda V A Mohan; Yaohua H Zhao; Pui In Mak; Rui P Martins; Franco Maloberti;
PUBLICAÇÃO: 2015, FONTE: IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOLUME: 50, NÚMERO: 10

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TÃTULO: Split-SAR ADCs: Improved Linearity With Power and Speed Optimization Full Text
AUTORES: Yan Zhu; Chi Hang Chan; Fat F Chio; Sai Weng Sin; Seng Pan U; Rui Paulo Martins; Franco Maloberti;
PUBLICAÇÃO: 2014, FONTE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 22, NÚMERO: 2

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WOS

TÃTULO: Jitter-resistant Capacitor Based Sine-Shaped DAC for Continuous-Time Sigma-Delta modulators
AUTORES: Feng, D; Maloberti, F; Sin, SW; Seng Pan, U; Martins, RP;
PUBLICAÇÃO: 2014, FONTE: 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 in Proceedings - IEEE International Symposium on Circuits and Systems

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TÃTULO: A 5-bit 1.25-GS/s 4x-capacitive-folding flash ADC in 65-nm CMOS
AUTORES: Chan, CH; Zhu, Y; Sin, SW; U, SP; Martins, RP; Maloberti, F;
PUBLICAÇÃO: 2013, FONTE: IEEE Journal of Solid-State Circuits, VOLUME: 48, NÚMERO: 9

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