Combination of Radix-2≪Sup≫M≪/Sup≫ Multiplier Blocks and Adder Compressors for the Design of Efficient 2'S Complement 64-Bit Array Multipliers

AuthID
 P-012-YN7
3
Author(s)
Pieper, LZ
·
da Costa, EAC
·
Tipo de Documento
Proceedings Paper
Year published
2013
Publicado
in 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI)
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