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Influence of Parasitic Capacitances in Modeling and Analysis of Advanced Floating Gate Memory Devices

AuthID
P-007-RRD

Author(s)

Moreira, A

Da Silva, JM

Tao, G

Tipo de Documento

Proceedings Paper

Year published

2009

Publicado

in Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA

Páginas: 302-306

Conference

2009 16Th Ieee International Symposium on the Physical and Failure Analysis of Integrated Circuits, Ipfa 2009, Date: 6 July 2009 through 10 July 2009, Location: Suzhou, Patrocinadores: IEEE Nanjing Section

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Publication Identifiers

DOI: 10.1109/ipfa.2009.5232645

Handle: https://hdl.handle.net/10216/57161

SCOPUS: 2-s2.0-71049152490

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Influence of Parasitic Capacitances in Modeling and Analysis of Advanced Floating Gate Memory Devices

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