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A 0.024Mm2 8B 400Ms/S Sar Adc with 2B/Cycle and Resistive Dac in 65Nm Cmos

AuthID
P-007-YAC

Author(s)

Wei, H

Chan, CH

Chio, UF

Sin, SW

Seng Pan, U

Martins, R

Maloberti, F

Document Type

Proceedings Paper

Year published

2011

Published

in Digest of Technical Papers - IEEE International Solid-State Circuits Conference, ISSN: 0193-6530

Pages: 188-189

Conference

2011 Ieee International Solid-State Circuits Conference, Isscc 2011, Date: 20 February 2011 through 24 February 2011, Location: San Francisco, CA

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Sources

Publication Identifiers

DOI: 10.1109/isscc.2011.5746276

Scopus: 2-s2.0-79955746515

Source Identifiers

ISSN: 0193-6530

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A 0.024Mm2 8B 400Ms/S Sar Adc with 2B/Cycle and Resistive Dac in 65Nm Cmos

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A 0.024Mm2 8B 400Ms/S Sar Adc with 2B/Cycle and Resistive Dac in 65Nm Cmos

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