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A 12-Bit 110Ms/S 4-Stage Single-Opamp Pipelined Sar Adc with Ratio-Based Gec Technique

AuthID
P-008-7X8

Author(s)

Wang, R

Chio, UF

Sin, SW

Seng Pan, U

Wang, Z

Martins, RP

Tipo de Documento

Proceedings Paper

Year published

2012

Publicado

in European Solid-State Circuits Conference, ISSN: 1930-8833

Páginas: 265-268

Conference

38Th European Solid State Circuits Conference, Esscirc 2012, Date: 17 September 2012 through 21 September 2012, Location: Bordeaux, Patrocinadores: SMSC;Region Aquitaine;CSEM;Atlantic Innovation;ST

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Publication Identifiers

DOI: 10.1109/esscirc.2012.6341336

SCOPUS: 2-s2.0-84870817729

Source Identifiers

ISSN: 1930-8833

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A 12-Bit 110Ms/S 4-Stage Single-Opamp Pipelined Sar Adc with Ratio-Based Gec Technique

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A 12-Bit 110Ms/S 4-Stage Single-Opamp Pipelined Sar Adc with Ratio-Based Gec Technique

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